Tomio Nakano

Semiconductor memory device having stacked capacitor-type memory cells

Semiconductor devices having fuses

Dynamic semiconductor memory device having a simultaneous test function for divided memory cell blocks

Semiconductor memory device having extended period for outputting data

Address buffer circuit

Dynamic random access memory having improved refresh timing

Semiconductor memory device capable of selective operation of memory cell blocks

Semiconductor memory device having active pull-up circuits

Information storing circuit using blown and unblown fuses

Semiconductor memory device having divided regular circuits