Tomohiro Sano

A 40 nm CMOS 0.4–6 GHz Receiver Resilient to Out-of-Band Blockers

A highly-linear software-defined radio operating from 400 MHz to 6 GHz is presented, with the purpose of removing any dedicated filtering at the antenna. Very high resilience to out-of-band interference is achieved thanks to a 2.5 V linear LNA and mixer-based RF blocker filter. The 2 mm2, 40 nm digital CMOS receiver achieves +10 dBm out-of-band IIP3 and >; +70 dBm calibrated IIP2 at 3 dB NF. It tolerates 0 dBm blockers at 20 MHz offset with acceptable blocker NF.

A 5 mm

A 5 mm2 transceiver front-end suitable for a software-defined radio (SDR) platform is implemented in a 40-nm LP digital CMOS technology. Tailored for all modern communication standards relevant for a modern handheld mobile device (2G/3G/4G cellular, WLAN, Bluetooth, GPS, broadcasting, etc.), it uses radio architectures and circuits that ensure flexible performance at a minimal cost in area and power consumption. The receive section features four parallel LNAs to cover the frequency range from 100 MHz up to 6 GHz, a 25 % duty cycle passive mixer with IIP2 calibration, fifth-order baseband filtering up to 20 MHz, variable-gain amplification, and a 10-b 65 MS/s 34 fj/conv-step SAR ADC. It achieves NF down to 2.4 dB, more than 30-dB EVM and 50-dBm IIP2. In the transmit section, main emphasis is given to the out-of-band noise requirement that enables SAW-less operation in FDD systems: a flexible reconstruction filter is followed by a voltage-sampling mixer and a variable gain PPA. The TX chain achieves 3.2% EVM at 0-dBm output power, with CNR down to-156 dBc/Hz. For frequency synthesis, two dual-VCO 5.9-12.8 GHz fractional-N PLLs are implemented together with a chain of divide-by-2 circuits for quadrature generation.

^{2}

SDRs come of age ([1,2]) and transcend beyond just acquiring the reconfigura-bility to replace any standard radio: they develop toward systems where a simplified antenna interface can be used, with most dedicated filtering removed. This requires a receiver accommodating much higher linearity and resilience against out-of-band interference than a standard radio, still achieving competitive sensitivity (especially in the absence of interference). Mixer-first front-ends with excellent linearity have been reported [3]. However, their NF (including 1/f in absence of the LNA gain) is not competitive, and they may suffer from large LO feedthrough to the antenna (LOFT). Moreover they lack receiver functionality such as gain and filtering, which cannot be simply added without compromising linearity. A receiver with mixer-at-the-antenna-based bandpass filter [4] similarly may suffer from LOFT and increased N F. This work presents a full software-defined receiver with 3dB NF that tolerates 0dBm blockers with acceptable blocker NF at maximum gain. It achieves +10dBm out-of-band (OB) IIP3 and >+70dBm IIP2. Such a receiver is to operate using no other than harmonic-rejection filtering.

40 nm LP CMOS Transceiver for a Software-Defined Radio Platform

The trend in wireless communication where terminals give their users ubiquitous access to a multitude of services drives the development of Software-Defined Radio (SDR) in deeply scaled CMOS. This is enhanced with the advent of LTE, a standard that is inherently so flexible that an SDR is its most economical implementation. This work presents an answer to that need with the development of a complete transceiver with RF, baseband and data converter circuits in 40nm LP CMOS.

A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers

In FDD cellular standards, the transmitters out of-band noise leaks into the receive band due to the finite duplexer TX to RX isolation. If this noise is not low enough, a SAW filter is needed before the Power Amplifier to preserve the RX sensitivity. Out-of-band noise is also an important concern for coexistence of cellular transmitters with standards like GPS, WLAN and/or WiMAX on the same smart phone, a very common scenario nowadays. The SAW-less RX-band noise challenge becomes even more acute in the Long-Term Evolution (LTE) standard [1] where transmitters will need to operate in multiple FDD bands, using wider channel bandwidths and higher Peak-to-Average Power Ratios (PAPR).

A 5mm 2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver

We present a multiband LTE SAW-less CMOS transmitter. Source followers, which drive passive mixers, contribute to the small-area and low-power transmitter. An envelope-tracking technique improves the linearity of RF programmable gain amplifiers, and Marchand baluns are suitable for multiband operation. The transmitter, which includes digital-to-analog converts and a phase-locked loop, covers 700 MHz to 2.6 GHz with −42 dBc ACLR. RX-band noise of −161 dBc/Hz is good enough for SAW-less operation.

A multiband LTE SAW-less modulator with −160dBc/Hz RX-band noise in 40nm LP CMOS

A discrete-time filter for GSM/WCDMA/WLAN with area reduction technique is presented. The discrete-time filtering is suitable for pass band selection and anti-alias filtering. Reduction of large switched-capacitor area is a key issue for the filter. In this paper, we propose the retiming technique and the optimization of unit capacitor to reduce the number of capacitors. The area of the filter with IQ channels is 1.8 mm2 . Noise Figure (NF) and current consumption in GSM mode are 23.2 dB and 11 mA, respectively. This filter is fabricated in 0.13 um CMOS.