Toshifumi Satoh

Superconducting (Sr, Nd) CuOy thin films with infinite-layer structure

Abstract Thin films with infinite-layer structure have been prepared using a magnetron sputtering system and the substitution of neodymium for strontium in SrCuO 2 has been successfully carried out, which is similar to the case of the high-pressure synthesis. (Sr, Nd)CuO y films were grown in a reducing atmosphere on SrTiO 3 single crystals and epitaxial growth with [001] orientation normal to the substrate was realized at the substrate temperature of 550–600°C. Superconducting transition was observed for some as-grown films, and the Sr 0.88 Nd 0.12 CuO y film showed the highest T c of 16 K.

Highly oriented Hg‐Ba‐Ca‐Cu‐O superconducting thin films

Hg‐Ba‐Ca‐Cu‐O thin films have been prepared on SrTiO3(100) substrates by rf‐magnetron sputtering and subsequent annealing. The annealing treatment was carried out in a Hg‐free atmosphere at the relatively low temperature of 650–700 °C. The films showed a highly oriented structure with the c axis of the Hg‐1201 phase perpendicular to the substrates. The Hg‐Ba‐Ca‐Cu‐O films exhibited a sharp superconducting transition at around 85 K, and a resistivity anomaly at the higher temperature of 130 K was observed for some films.

Effects of PLT-buffer layer on microstructures of sputtered PLZT thin films epitaxially grown on sapphire

The microstructures of sputtered thin films of lead-lanthanum zirconate-titanate (PLZT) on (0001) sapphire substrate have been studied using scanning electron microscopy (SEM) and transmission electron microscopy (TEM). Thin films of polycrystalline PLZT (9/65/35), Pb 0.91 La 0.09 Zr 0.65 Ti 0.35 O 3 , were prepared on a (0001) sapphire substrate by reactive sputtering, using the dc-magnetron system with a multitarget, Pb, La, Zr, and Ti at the substrate temperature of 700 °C. The PLZT thin films comprised (111) oriented small crystallites of PLZT. Although the average direction of the crystal orientation corresponded to the ideal epitaxial relationship (111) PLZT ‖ (0001) sapphire, the individual crystallites showed misalignment in both the growth direction and the film plane. The thin films could not be considered epitaxially grown films. From analysis of the TEM images, there exists an interfacial region between the PLZT thin film and the substrate. The interfacial region comprises ordered clusters of (111), disordered (101), and/or (110) PLZT crystallites. The presence of the interfacial region will suppress ideal epitaxial growth with uniform crystal orientation. It is confirmed that the addition of the buffer layer of graded composition of PLT-PLZT, between the substrate and the PLZT thin film, will suppress the formation of the disordered interfacial region and will enhance the epitaxial growth of the (111) PLZT on (0001) sapphire with three-dimensional crystal orientations.

Incorporation of carbon into infinite-layer BaCuO2 films and formation of superconducting phase

Abstract We have investigated the incorporation of carbon into infinite-layer BaCuO2 films using a sputtering method. When carbon was doped, the films showed a modulated structure with 2c and 3c periodicity along the c-axis of the BaCuO2, indicating that the carbon-incorporated layers are ordered. Transmission-electron-microscopy observation suggested that the “2c” and the “3c” structures were isomorphous with the 1201 (endmember) and 1212 phases of homologous (C,Cu)Ba2Can−1CunOx, respectively. The “2c” modulated film exhibited a superconducting transition around 40–50 K.

Growth mechanism and structural studies of sputtered PbTiO3 thin films

The surface of sputtered PbTiO3 thin films, 5–200 nm in thickness, epitaxially grown on miscut (001) SrTiO3 substrates with miscut angle of 1.7° comprised a periodic striped pattern which was reflected in the initial surface structure of the substrates. The electron microscopic analysis suggests that the film growth is governed by a step-flow model which corresponds to Frank–van der Merwe mode. The surface was extremely smooth with surface roughness less than 3 nm for a film thickness of 200 nm. The sputtered films showed a homogeneous microstructure with three-dimensional epitaxy. The deposition on miscut substrates realizes the growth of perfect single crystal perovskite thin films, having full in-plane alignment together with a continuous film through a large area.

Structural Control of Epitaxially Grown Sputtered PbTiO3 Thin Films

Microstructures of sputtered PbTiO 3 films on SrTiO 3 substrates have been studied. It is known that the epitaxial PbTiO 3 films include microstructures. It was found that the formation of these microstructures was strongly influenced by the off-stoichiometry of the sputtered films and substrate surface microstructures. Sputtering under the stoichiometric condition on miscut (001)SrTiO 3 led to the growth of ultrathin single-crystal PbTiO 3 films 10-100 nm thick with continuous structure ; under the off-stoichiometric condition the sputtered films comprised microstructures with screwlike dislocation. The ultrathin films exhibited lattice distortion which modified their ferroelectric properties.

Microstructures of sputtered PbTiO3 thin films

Ultrathin stoichiometric PbTiO3 films, 10–100 nm thick, were deposited on (001) SrTiO3 substrate at 600 °C by rf planar magnetron sputtering to understand the microstructure of initial film growth. The electron microscopy and x‐ray diffraction analysis suggested epitaxial growth of (001) PbTiO3/(001) SrTiO3 with three‐dimensional crystal orientation; however, the PbTiO3 films still included crystal boundaries. Miscut (001) SrTiO3 substrates reduced the crystal boundaries and provided continuous ultrathin films of single crystal PbTiO3. Rapid thermal annealing at 600 °C for 10 s further improved their crystallinity.

X-ray irradiation enhanced critical current density and strong pinning sites created in Gd1Ba2Cu3O7−x thin films

An enhancement of the critical current density (to more than 106 A/cm2 below 65 K) of Gd1Ba2Cu3O7−x superconducting thin films was achieved by X-ray irradiation with oxygen annealing. This process of X-ray irradiation with oxygen annealing introduced stable pinning centers into the crystal and also increased the activation energy from 0.1 eV to 0.25 eV.

Hot-carrier degradation and electric field and electron concentration near drain junction in low-temperature N-channel single drain and lightly doped drain polycrystalline silicon thin film transistors

We proposed a two-dimensional (2-D) physical model of n-channel polycrystalline silicon (poly-Si) single drain (SD) and lightly-doped drain (LDD) thin film transistor (TFT) to analyze hot-carrier degradation. The model is based on a 2-D device simulators Gaussian doping profiles for the source and drain junctions fitted to the lateral and vertical impurity profiles in poly-Si obtained from a 2-D process simulator. It is found that, for current saturation bias, the maximum 2-D lateral electric field is located in the deep drain region under the gate, and the current flows in the deep channel region near the drain junction. In poly-Si n-channel TFTs, it was predicted from our 2-D device simulation that the generation of both band-tail states in poly-Si and interface states at both interfaces can contribute to hot-carrier degradation. We have shown that, in the case of n-channel SD TFTs, generated band-tail states greatly affect drain avalanche hot-carrier (DAHC) degradation for longer stress time of 10,000 s.

Hot-Carrier Degradation in Low-Temperature Polycrystalline Silicon n-Channel Lightly Doped Drain Thin-Film Transistors

The hot-carrier degradation mechanism in low-temperature polycrystalline silicon (poly-Si) n-channel lightly doped drain (LDD) thin-film transistors (TFTs) is investigated. The degradation is characterized by transconductance degradation (ΔGm) at low drain voltage (Vd) and decreases in substrate current (Isub) and kink current at high Vd. It is assumed that the trapped negative charges (acceptor-type trap states) in the gate edge region, mostly outside and partly inside the gate, contribute to hot-carrier degradation after stress under current saturation bias. The degradation presumably first occurs outside the gate in the LDD region and, with increasing stress time, the electron-trapped region expands toward the channel under the gate owing to the saturation of electrons in the trap states. At high-Vd bias, a decrease in the lateral electric field in the gate-edge region due to the presence of negative charges reduces Isub and the drain current Id, thereby reducing the kink current. At low-Vd bias, the current flow near the upper interface in the gate-edge region decreases after the stress owing to the generated negative charges. The negative charges lead to the decrease in Id in the deep-gate voltage Vg region in Vg–Id characteristics.