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Dive into the research topics where Toshihiro Ozaki is active.

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Featured researches published by Toshihiro Ozaki.


IEEE Journal of Solid-state Circuits | 2016

Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting

Toshihiro Ozaki; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa

This paper proposes a fully-integrated high-conversion-ratio dual-output voltage boost converter (VBC) with maximum power point tracking (MPPT) circuits for low-voltage energy harvesting. The VBC consists of two voltage generators that generate V<sub>OUT1</sub> and V<sub>OUT2</sub>. V<sub>OUT1</sub> and V<sub>OUT2</sub> are three and nine times higher than the harvesters output V<sub>IN</sub>, respectively. V<sub>OUT1</sub> is used as a supply voltage for on-chip application circuits while V<sub>OUT2</sub> is used as the charging voltage for a Li-ion secondary battery. The VBC achieves a high voltage conversion ratio (max. × 9) and a high power conversion efficiency. The MPPT circuits control the operating frequencies of the CPs to extract maximum power at each output. The measurement results demonstrated that the circuit converted a 0.59 V input to a 1.41 V output with 75.8% efficiency when the output powers of V<sub>OUT1</sub> and V<sub>OUT2</sub> were 396 and 0 μW, respectively, and a 0.62 V input to a 4.54 V output with 49.1% efficiency when the output powers were 0 and 114 μW, respectively.


european solid state circuits conference | 2014

A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters

Toshihiro Ozaki; Tetsuya Hirose; Takahiro Nagai; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa

This paper proposes a fully integrated voltage boost converter with a maximum power point tracking (MPPT) circuit for ultra-low power energy harvesting. The converter is based on a conventional charge pump circuit and can deliver a wide range of load current by using nMOS and pMOS driver circuits for highly efficient switching operation. The MPPT circuit we propose dissipates nano-watt power to extract maximum power regardless of the harvesters power generation conditions and load current. The measurement results demonstrated that the circuit converted a 0.49-V input to a 1.46-V output with 73.6% power conversion efficiency when the output power was 348 μW. The circuit can operate at an extremely low input of 0.21 V.


asian solid state circuits conference | 2015

A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting

Toshihiro Ozaki; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa

This paper proposes a fully-integrated high-conversion-ratio dual-output voltage boost converter (VBC) with maximum power point tracking (MPPT) circuits for low-voltage energy harvesting. The VBC consists of two voltage generators that generate VOUT1 and VOUT2. VOUT1 and VOUT2 are three and nine times higher than the harvesters output Vin, respectively. VOUT1 is used as a supply voltage for on-chip application circuits while VOUT2 is used as the charging voltage for a Li-ion battery. The VBC achieves a high voltage conversion ratio (max. × 9) and a high power conversion efficiency with a small number of charge pumps (CPs). The MPPT circuits control the operating frequencies of the CPs to extract maximum power at each output. The measurement results demonstrated that the circuit converted a 0.59-V input to a 1.41-V output with 75.8% efficiency when the output powers of VOUT1 and VOUT2 were 396 and 0 μW, respectively, and a 0.62-V input to a 4.54-V output with 49.1% efficiency when the output powers were 0 and 114 μW, respectively.


asia and south pacific design automation conference | 2015

A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters

Toshihiro Ozaki; Tetsuya Hirose; Takahiro Nagai; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa

We propose a fully integrated 3-terminal voltage converter with a maximum power point tracking (MPPT) circuit for ultra-low voltage energy harvesting. The MPPT circuit dissipates nano-watt power to extract maximum output power. The measurement results demonstrated that the circuit converted a 0.49-V input to a 1.46-V output with 73.6% power conversion efficiency when the output power was 348 μW. The circuit can operate at an extremely low input voltage of 0.21 V.


Japanese Journal of Applied Physics | 2016

A fully on-chip three-terminal switched-capacitor DC–DC converter for low-voltage CMOS LSIs

Yuta Kojima; Tetsuya Hirose; Keishi Tsubaki; Toshihiro Ozaki; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa

In this paper, we present a fully on-chip switched-capacitor DC–DC converter for low-voltage CMOS LSIs. The converter has three terminals of input, ground, and output, by developing control circuits with fully on-chip configuration. We employ an ultra low-power nanoampere bias current and voltage reference circuit to achieve ultra low-power dissipation of control circuits. It enables us to realize a highly efficient power conversion circuit at light-load-current applications. The converter achieves highly efficient and robust voltage conversion using a pulse frequency modulation control circuit and a start-up/fail-safe circuit. Measurement results demonstrated that the converter can convert a 3.0 V input into 1.2 V output successfully. The start-up and fail-safe operations were confirmed through the measurement. The efficiency was more than 50% in the range of 2–6 µA load current.


Japanese Journal of Applied Physics | 2015

Nano watt power rail-to-rail CMOS amplifier with adaptive biasing circuits for ultralow-power analog LSIs

Toshihiro Ozaki; Tetsuya Hirose; Keishi Tsubaki; Nobutaka Kuroki; Masahiro Numa

In this paper, we present a rail-to-rail folded-cascode amplifier (AMP) with adaptive biasing circuits (ABCs). The circuit uses a nano ampere current reference circuit to achieve ultralow-power and ABCs to achieve high-speed operation. The ABCs are based on conventional circuits and modified to be suitable for rail-to-rail operation. The measurement results demonstrated that the AMP with the proposed ABCs can operate with an ultralow-power of 384 nA when the input voltage was 0.9 V and achieve high speeds of 0.162 V/µs at the rise time and 0.233 V/µs at the fall time when the input pulse frequency and the amplitude were 10 kHz and 1.5 Vpp, respectively.


international symposium on circuits and systems | 2017

An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications

Hiroki Asano; Tetsuya Hirose; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa

In this paper, we propose a fully integrated and area-efficient resistor-less relaxation oscillator (ROSC) for ultra-low power real-time clock (RTC) applications. The proposed ROSC is based on a conventional ROSC and modified to be area-efficient circuit configuration, without using resistors. The proposed ROSC consists of a bias current source, proportional to absolute temperature (PTAT) voltage source, current mode ROSC, shunt regulator, and output logic circuit. The PTAT voltage source and shut regulator are used to compensate for the temperature characteristics of the ROSC. By implementing our proposed ROSC in a 65-nm CMOS process, the area was 0.022 mm2. Simulated results demonstrated that our proposed ROSC generates 32.5-kHz clock frequency and achieves ultra-low power dissipation of 271 nW. The temperature and voltage dependences of the oscillation frequency were 138ppm/°C and 13.9ppm/mV, respectively. Monte Carlo statistical simulations showed that the mean, standard deviation, and the coefficient of variation are 32.3 kHz, 0.6 kHz, and 1.9%, respectively.


asia and south pacific design automation conference | 2017

Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems

Hiroki Asano; Tetsuya Hirose; Taro Miyoshi; Keishi Tsubaki; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa

We propose a sub-1-μs start-up time, fully integrated 32-MHz relaxation oscillator (ROSC) for intermittent VLSI systems. Our proposed ROSC employs current mode architecture that is different from conventional voltage mode architecture. This enables compact and fast switching speed to be achieved. The measurement results demonstrated that the ROSC achieved sub-1-μs start-up time and generated stable output frequency of 32.6 MHz. Measured line regulation, temperature coefficient, and variation coefficient in 10 samples were ±0.69, ±0.38, and 0.62%, respectively.


Japanese Journal of Applied Physics | 2017

Ultralow-quiescent-current and wide-load-range low-dropout linear regulator with self-biasing technique for micropower battery management

Toshihiro Ozaki; Tetsuya Hirose; Hiroki Asano; Nobutaka Kuroki; Masahiro Numa

In this paper, we present a 151 nA quiescent and 6.8 mA maximum-output-current low-dropout (LDO) linear regulator for micropower battery management. The LDO regulator employs self-biasing and multiple-stacked cascode techniques to achieve efficient, accurate, and high-voltage-input-tolerant operation. Measurement results demonstrated that the proposed LDO regulator operates with an ultralow quiescent current of 151 nA. The maximum output currents with a 4.16 V output were 1.0 and 6.8 mA when the input voltages were 4.25 and 5.0 V, respectively.


international new circuits and systems conference | 2016

A fully integrated, 1-µs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems

Hiroki Asano; Tetsuya Hirose; Taro Miyoshi; Keishi Tsubaki; Toshihiro Ozaki; Nobutaka Kuroki; Masahiro Numa

This paper proposes a fully integrated 32-MHz relaxation oscillator (ROSC) capable of fast start-up time operation for low-power intermittent VLSI systems. The proposed ROSC employs current mode architecture that is different from conventional voltage mode architecture. This enables compact and fast switching speed to be achieved. By designing transistor sizes equally between one in a bias circuit and another in a voltage to current converter, the effect of process variation can be minimized. A prototype chip in a 0.18-μm CMOS demonstrated that the ROSC generates a stable clock frequency of 32.6 MHz within 1-μs start-up time. Measured line regulation and temperature coefficient were ±0.69% and ±0.38%, respectively.

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