Toshiki Hisada

A 120mm 2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology

NAND flash memory use in digital still cameras and cellular phones is driving demand for larger-capacity storage. Moreover, NAND flash has the potential to replace HDDs. To achieve larger capacity while maintaining low cost per bit, technical improvements in feature size and area reduction are essential. To meet the stringent requirements, we develop a 16 Gb 4-level NAND flash memory in 43 nm CMOS technology. In 43 nm generation, gate-induced drain leakage (GIDL) influences the electrical field on both sides of NAND strings. GIDL causes severe program disturb problems to NAND flash memories. To avoid GIDL, two dummy wordlines (WL) on both sides of NAND strings are added. This is effective because the dummy gate voltages, are selected independent of the program inhibit voltage.

A 19 nm 112.8 mm

NAND flash memory is widely used in digital cameras, USB devices, cell phones, camcorders and solid-state drives. Continuous lowering of bit cost, increasing flash-memory-die densities and improving performance have helped to expand flash markets. Recently, there are two different directions to meet market demands. One is lowering bit cost and increase memory density to the utmost limit, which is achieved by 4b/cell [1] or 3b/cell [2]. The other is focusing on high performance and high reliability. To meet both demands, we develop a 19nm 112.8mm2 64Gb 2b/cell NAND flash memory with the smallest die size ever reported. 15MB/s programming throughput and 400Mb/s/pin 1.8V Toggle Mode interface [3] are achieved for the first time. Die Micrograph and features are shown in Figure 25.1.1.