Toshinori Uemura

125-µm-pitch × 12-channel “optical pin” array as I/O structure for novel miniaturized optical transceiver chips

We have developed an optical I/O structure using an array of optical pins for a chip-scale parallel optical module named an “optical I/O core.” The optical pin is a kind of vertical polymer waveguide, which is made from UV curable resins. The optimum shape and combination of resins for the optical pins were determined by ray-trace simulation. The numerical aperture (NA) of the developed optical pins is more than 0.4. A photolithographic technique was used to produce a 125-μm-pitch × 12-channel optical pin array. The coupling losses between a GI-50 multi-mode optical fiber (MMF) and the optical pins for a receiver (RX) and transmitter (TX) were 0.41 dB and 2.3 dB, respectively. Wide coupling tolerance of more than 25 μm was also obtained when the allowable excess loss was 0.5 dB. Furthermore, clear eye diagrams were obtained for 25-Gbps back-to-back transmission by using the optical I/O cores with the optical pins and GI-50 MMF.

VCSEL-based parallel-optical modules for >100 Gb/s applications

We introduce solder reflow-capable high-density parallel-optical modules for >100 Gb/s optical interconnects. Polymer-waveguide-coupled parallel-optical modules are also introduced with a unique mounting technology. 1060-nm 28-Gb/s InGaAs/GaAs VCSEL realizes a good signal quality at high temperature and error free for MMF transmission beyond 500m.

Polymer waveguide-coupled 14-Gb/s × 12-channel parallel-optical modules mounted on optical PCB through Sn-Ag-Cu-solder reflow

We demonstrate a novel architecture of mounting parallel-optical modules (POMs) onto an optical printed circuit board (PCB) through Sn-Ag-Cu-solder reflow process where precisely positioned stud-pins on optical PCB and guide holes formed on POMs were mated to maintain good optical coupling. We confirmed that fabricated 14-Gb/s × 12-channel POMs achieved a good transmission performance on a test environment using evaluation boards. Then, the POM was mounted onto the optical PCB through Sn-Ag-Cu-solder reflow process actually. We report coupling loss characteristics and signal qualities at 14-Gb/s PRBS 231-1 for the optical link using POM-mounted optical PCBs.

Chip-scale packaging of hybrid-integrated Si photonic transceiver: Optical I/O core

A chip-scale package structure for Si photonic optical transceivers has been developed. The foot print of the transceiver is 5 mm × 5mm. By using an optical pin array and glass interposer with through-glass vias (TGVs), high density optical and electrical I/O interfaces are configured on one side of the package. The optical pin acts as a vertical waveguide or spot-size converter (SSC). The combination of the optical pin and the O-band multimode transmission provides large misalignment tolerance for the optical interface. The developed optical transceiver has a high degree of usability for various applications, such as multi-chip modules and active optical cables, and is called “optical I/O core.” The optical I/O core demonstrated 25 Gbps/ch error-free operation over a 300-m multimode fiber. The optical I/O core is a promising solution for relieving the I/O bottleneck in high-bandwidth inter-chip data transmission.

Shallow-grating coupler with optimized anti-reflection coating for high-efficiency optical output into multimode fiber

We present an optimized design of a shallow grating coupler in a silicon-on-insulator (SOI) wafer with a quadruple anti-reflection coating (ARC) of multiple layers of SiO2 and SiOxNy for coupling to a multimode fiber. The ARC is designed to generate sufficient destructive interference for downward emission while maintaining constructive interference for upward emission. We confirm numerically that the upward directionality of the grating is as high as −0.58 dB. Because the grating is shallow and the ARC is away from the SOI core layer, the back reflection along the input waveguide can be suppressed to −27 dB.

High-efficiency folded shallow-grating coupler with minimal back reflection toward isolator-free optical integration

Back reflection from grating couplers can be an obstacle to integrate them with isolator-free light sources. A folded shallow-grating coupler is proposed. We numerically confirmed a back reflection of -27 dB while achieving an upward emitting efficiency of -0.58 dB.

1060-nm 10-Gb/s × 12-channel parallel-optical modules for optical interconnects

Optical interconnects has been a key technology to realize signal transmission in rack-to-rack application where active optical cables (AOCs) such as QSFP have been employed so far. At present, it is required to mount parallel-optical modules with high-density to increase multiple numbers of signals in board-to-board applications which are highly expected in the next order of rack-to-rack applications. On the other hand, power reduction is a key issue in the next generation board-to-board optical interconnects where a low power consumption as same as 10 mW/Gb/s/link is required based on the trend of power reduction. To realize low power optical interconnects, we have been proposing 1060-nm optical interconnects which also achieve high speed modulation, high reliability, and high signal quality. We fabricated TX and RX 1060-nm 10-Gb/s × 12-channel parallel-optical modules. The mechanical size is as small as 13 mm × 13 mm × 3.4 mm. Operating all 12 channels in TX and RX parallel-optical modules simultaneously, we have achieved error-free transmission over the case temperature range ranging up 15 °C to 80 °C in back-to-back. We also achieved error-free transmission for a legacy OM-2 multimode fiber of 300m with the power penalty less than 2.0 dB. By using high-efficient 1060 nm VCSELs, power reduction is expected where we achieved optical link power of 7 mW/Gb/s/link at the case temperature of 80 °C. We performed reliability tests based on Tercordia GR-468. The results show that the optical modules are highly reliable since the variation of optical output power is less than ±10 % in all reliability tests.

Polymer Waveguide-Coupled Solderable Optical Modules for High-Density Optical Interconnects

To realize simple and low-cost VCSEL-based parallel-optical modules mounted onto a polymer-waveguide-embedded PCB in high density, we propose a new mounting technology using a guide pin-assisted optical coupling stabilization during a Sn-Ag-Cu solder -- reflow process. The guide holes of the 12-channel optical module and the guide pins of optical PCB are precisely shaped by a high-precision machining and photolithography technologies, respectively. The allowable optical axis displacement is +/-12 um in both x-and y-axes between the parallel-optical module and the arrayed polymer-waveguide. We fabricated VCSEL-based 14-Gb/s x 12-channel transmitter/receiver modules and 25-Gb/s x 4-channel transceiver modules based on the 12-channel packaging. The module was soldered on a polymer waveguide-embedded PCB to achieve a sufficiently low optical coupling loss. In the link tests, we successfully achieved a BER of 10^-12 for both 14-Gb/s x 12-channel and 25-Gb/s x 4-channel optical links.

A Very High-Dense on-Board Optical Module Realizing >1.3 Tb/s/Inch ^2

We demonstrate >1.3-Tb/s VCSEL-based on-board optical module for high-density optical interconnects. The optical module integrates 28-Gb/s × 24-channel transmitter and receiver into one package of 1-inch^2 footprint. Subsequently, the total data rate is as high as 1.34 Tb/s. As investigated the temperature distributions of an optical module in calculation and experiment, an operating case temperature of optical module is lower than the maximum case temperature of 70 degree C in a practical air-cooling environment with the total power consumption of 9.1 W when activating all CDR circuitries as the harshest condition. The module exhibits a total jitter margin of 0.48 U. I. at a BER of 10^-12 when operated by a 28.05-Gb/s NRZ PRBS bit stream for each channel. By bypassing CDR circuitries with a capable length of electrical transmission line of 30 mm, a jitter margin was degraded to 0.21 U. I. at a case temperature of 70 degree C. If a system accepts such a level of jitter margin, the total power consumption can be suppressed to 6.0 W and an operating case temperature can be decreased accordingly.

Thermal design of 28-Gb/s × 24-channel CDR-integrated VCSEL-based transceiver module

We report the thermal design of 28-Gb/s × 24-channel CDR-integrated VCSEL-based transceiver optical module for high density optical interconnects. The transceiver module realizes a very high data rate density of 1346 Gb/s/inch2 at a total power consumption of 9.1 W. A unique design of this optical module realizes to use the whole top surface for thermal dissipation. We performed thermal simulations to reduce the temperature difference between case temperature and device temperatures. As investigated the thermal characteristics in both calculation and measurement, the maximum temperature difference can be suppressed to ~8 °C. All device temperatures are within their operating temperature at the maximum case temperature of 70 °C. Activating all 24 channels, we operated the optical module by a 28.05-Gb/s 231-1 PRBS for each channel. All channels exhibited clearly opened eye diagrams and a total jitter margin of ~0.48 U.I. at a case temperature of 70 °C.