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Featured researches published by Masatoshi Tokushima.
Applied Physics Letters | 2000
Masatoshi Tokushima; Hideo Kosaka; Akihisa Tomita; Hirohito Yamada
We have demonstrated 1.55 μm wavelength lightwave propagation through a 120° sharply bent waveguide formed in a triangular-lattice two-dimensional photonic crystal (2D PC). Such propagation has not previously been experimentally confirmed. The photonic crystal was fabricated in a silicon-on-insulator (SOI) wafer with the top silicon layer of the wafer used as a core layer. A 877-μm-long single-line-defect waveguide was formed in the PC with a sharp 120° bend near the middle of the waveguide. A tapered-hemispherical-end fiber was coupled to the input end of the waveguide for the light input, and the output from the other end of the waveguide was directly observed by scanning its near-field profile with another tapered-hemispherical-end fiber.
Applied Physics Letters | 2004
Masatoshi Tokushima; Hirohito Yamada; Yasuhiko Arakawa
We have experimentally demonstrated the guiding of light at a 1.5 μm wavelength in straight and 90°-bent line-defect waveguides in two-dimensional square-lattice-of-rods photonic crystal slabs. The light was guided by being confined in a row of the rods that were thinner than the surrounding ones. A new structural design to greatly facilitate their fabrication process without degrading the guiding property was used. The propagation loss measured for a 1.8-mm-straight waveguide was 4.8 dB/mm, which is small enough to allow us to proceed to integrated optical circuit application.
IEEE Journal of Quantum Electronics | 2002
Masatoshi Tokushima; Hirohito Yamada
The guided and leaky modes of a photonic-crystal-slab line-defect waveguide were investigated by means of the direct three-dimensional (3-D) finite-difference time-domain (FDTD) simulation. The simulation predicted quasi-guided modes with long lifetimes in the cladding-mode continuum, while quasi-3-D analyses using projected band diagrams revealed only the existence of guided modes outside that continuum. It is shown that the direct 3-D analysis is necessary to account for measured transmission data for the photonic-crystal-slab line-defect waveguide with a finite length.
Applied Physics Letters | 2003
Jun Ushida; Masatoshi Tokushima; Masayuki Shirane; Hirohito Yamada
We present a systematic method for designing a perfect antireflection coating (ARC) for a semi-infinite one-dimensional (1D) photonic crystal (PC) with an arbitrary unit cell. We use Bloch wave expansion and time reversal symmetry, which leads exactly to analytic formulas of structural parameters for the ARC and renormalized Fresnel coefficients of the PC. Surface immittance (admittance and impedance) matching plays an essential role in designing the ARCs of 1D PCs, which is shown together with a practical example.
IEEE Journal of Selected Topics in Quantum Electronics | 2010
Juan Jose Vegas Olmos; Masatoshi Tokushima; Ken-ichi Kitayama
We present an integrated and pigtailed add-drop filter based on photonic crystal structures. In the characterization in static regime, the insertion losses around 25 dB are successfully overcome with the device providing error-free operation for add, drop, and multicasting operation (at 10 Gbit/s) and sustaining less than 2.5 dB of power penalty. We also emulate packet switching operation at 10 Gbit/s employing the device in combination with a silicon-wired waveguided-based integrated optical delay line, sustaining less than 2 dB power penalty. The demonstrated add-drop filter based on photonic crystal structures provides proof of the advantages of integrated structures for future all-optical photonic nodes. This compact device would be a core element of a futuristic photonic add-drop multiplexer.
Physical Review B | 2003
Jun Ushida; Masatoshi Tokushima; Masayuki Shirane; Akiko Gomyo; Hirohito Yamada
An electromagnetic (EM) Bloch wave propagating in a photonic crystal (PC) is characterized by the immittance (impedance and admittance) of the wave. The immittance is used to investigate transmission and reflection at a surface or an interface of the PC. In particular, the general properties of immittance are useful for clarifying the wave propagation characteristics. We give a general proof that the immittance of EM Bloch waves on a plane in infinite one- and two-dimensional (2D) PCs is real when the plane is a reflection plane of the PC and the Bloch wave vector is perpendicular to the plane. We also show that the pure-real feature of immittance on a reflection plane for an infinite three-dimensional PC is good approximation based on the numerical calculations. The analytical proof indicates that the method used for immittance matching is extremely simplified since only the real part of the immittance function is needed for analysis without numerical verification. As an application of the proof, we describe a method based on immittance matching for qualitatively evaluating the reflection at the surface of a semi-infinite 2D PC, at the interface between a semi-infinite slab waveguide (WG) and a semi-infinite 2D PC line-defect WG, and at the interface between a semi-infinite channel WG and a semi-infinite 2D PC slab line-defect WG.
Applied Physics Letters | 2006
Satoshi Iwamoto; Satomi Ishida; Yasuhiko Arakawa; Masatoshi Tokushima; Akiko Gomyo; Hirohito Yamada; Akio Higo; Hiroshi Toshiyoshi; Hiroyuki Fujita
We fabricated a photonic crystal (PC) line-defect waveguide integrated with a microelectromechanical actuator and demonstrated the optical switching operation. The device consisted of a PC line-defect waveguide fabricated in a silicon-on-insulator substrate and a polycrystalline-Si dielectric plate located above the PC waveguide. An applied voltage moved the dielectric plate towards the PC surface due to the electrostatic force. This motion increased out-of-plane scattering of the guided light through the evanescent interaction with the dielectric plate, and modulated the transmittance of the PC waveguide. With only a 5μm interaction length, an extinction ratio of ∼10dB was obtained at a wavelength of 1568nm under an applied voltage of 60V. The response time of the switching operation was approximately 1ms.
15th Annual GaAs IC Symposium | 1993
Hikaru Hida; Masatoshi Tokushima; Tadashi Maeda; Masaoki Ishikawa; Muneo Fukaishi; Keiichi Numata; Yasuo Ohno
A new technology for fabricating 0.25 /spl mu/m gate E/D-heterojunction FET LSIs is developed as a step towards the development of ultralow supply voltage LSIs. This technology, which is based upon all dry-process techniques, includes the formation of a 0.25 /spl mu/m gate opening through the use of optical lithography and inner SiO/sub 2/ sidewalls. The f/sub max/ and the g/sub max/ for a Y-shaped gate E-HJFET are 108 GHz and 530 mS/mm, respectively. Excellent performances are obtained with DCFL ring oscillators using n-AlGaAs/i-InGaAs pseudomorphic E/D-HJFETs. These include 18 ps/G unloaded delay and 109 ps/G loaded delay (FI=FO=3, L=1 mm) with 0.15 mW/G at a low supply voltage of 0.6 V, where inverters have a sufficient noise margin of more than 180 mV. Also, 10 Gbps error-free operation of a selector switch is demonstrated with 9.4 mW at 0.6 V.<<ETX>>
ieee gallium arsenide integrated circuit symposium | 1997
Tadashi Maeda; Shigeki Wada; Masatoshi Tokushima; Masaoki Ishikawa; Jin Yamazaki; Masahiro Fujii
This paper describes a GaAs divide-by-256/258 dual-modulus static prescaler IC. The prescaler has a pulse swallow counter-type architecture and quasi-differential switch flip-flop (QD-FF) as its basic circuit architecture. For the input buffer circuit, we have developed a circuit that we call a Source coupled push-pull circuit (SCC), which can generate high-frequency complementary signals from a single phase signal at a low supply voltage. The IC operates at up to 14.5 GHz with a power consumption of 22 mW. The power consumption is 1/100 that of a previously reported prescaler.
IEEE Journal of Solid-state Circuits | 1996
Tadashi Maeda; Keiichi Numata; Masahiro Fujii; Masatoshi Tokushima; Shigeki Wada; Muneo Fukaishi; Masaoki Ishikawa
The developed GaAs static flip-flop operates at a data rate of 10 Gb/s with a power consumption of 2.8 mW at a supply voltage of 0.6 V. The power consumption at 10 Gb/s is 1/3 that of the lowest reported value for D-FFs. A divider using the QD-FF configuration operates at a clock frequency of 16 GHz with a power consumption of 2.4 mW at a supply voltage of 0.6 V. The power-delay product is about one-third that of the lowest reported value for dividers.