Trevor Pering

A dynamic voltage scaled microprocessor system

A microprocessor system is presented in which the supply voltage and clock frequency can be dynamically varied so that the system can deliver high throughput when required while significantly extending battery life during the low speed periods. The system consists of a dc-dc switching regulator, an ARM V4 microprocessor with a 16-kB cache, a bank of 64-kB SRAM ICs, and an I/O interface IC. The four custom chips were fabricated in a standard 0.6-/spl mu/m 3-metal CMOS process. The system can dynamically vary the supply voltage from 1.2 to 3.8 V in less than 70 /spl mu/s. This provides a throughput range of 6-85 MIPS with an energy consumption of 0.54-5.6 mW/MIP yielding an effective energy efficiency as high as 26200 MIPS/W.

The simulation and evaluation of dynamic voltage scaling algorithms

The reduction of energy consumption in microprocessors can be accomplished without impacting the peak performance through the use of dynamic voltage scaling (DVS). This approach varies the processor voltage under software control to meet dynamically varying performance requirements. This paper presents a foundation for the simulation and analysis of DVS algorithms. These algorithms are applied to a benchmark suite specifically targeted for PDA devices.

The InfoPad multimedia terminal: a portable device for wireless information access

The architecture of a device that is optimized for wireless information access and display of multimedia data is substantially different than configurations designed for portable stand-alone operation. The requirements to reduce the weight and energy consumption are the same, but the availability of the wireless link, which is needed for the information access, allows utilization of remote resources. A limiting case is when the only computation that is provided in the portable terminal supports the wireless links or the I/O interfaces, and it is this extreme position that is explored in the InfoPad terminal design. The architecture of the InfoPad terminal, therefore, can be viewed as essentially a switch which connects multimedia data sources in the supporting wired network to appropriate InfoPad output devices (e.g., video display), and connects InfoPad input devices to remote processing (e.g., speech recognizer server) in the backbone network.

Design of wireless portable systems

The InfoPad project explores the infrastructure and devices required for portable wireless access to the national information infrastructure. The InfoPad model emphasizes high-bandwidth wireless connectivity and moves the computing power of the portable device into the backbone network, where we can provide not only full internet access, but increased computing power as well. By concentrating on I/O for the pad we reduce its cost, weight and power requirements, and increase the effective bandwidth through the greater error tolerance of I/O traffic such as video. We describe the InfoPad model, its infrastructure, and the results of the first prototype. This prototype proved the feasibility of the basic model and developed key technologies such as low-power design methodology and protocols for wireless connections. We also discuss the next generation InfoPad and our future plans.

Research challenges in wireless multimedia

The near future will bring the fusion of four rapidly evolving technologies: high speed networking and associated services, wireless communications, scaled integrated circuit technology, and multimedia-based applications. These new technologies will enable the access of multimedia data from network servers at any time and any place by light weight, low cost wireless terminals.