Ty McNutt

A High-Density, High-Efficiency, Isolated On-Board Vehicle Battery Charger Utilizing Silicon Carbide Power Devices

This paper presents an isolated on-board vehicular battery charger that utilizes silicon carbide (SiC) power devices to achieve high density and high efficiency for application in electric vehicles (EVs) and plug-in hybrid EVs (PHEVs). The proposed level 2 charger has a two-stage architecture where the first stage is a bridgeless boost ac-dc converter and the second stage is a phase-shifted full-bridge isolated dc-dc converter. The operation of both topologies is presented and the specific advantages gained through the use of SiC power devices are discussed. The design of power stage components, the packaging of the multichip power module, and the system-level packaging is presented with a primary focus on system density and a secondary focus on system efficiency. In this work, a hardware prototype is developed and a peak system efficiency of 95% is measured while operating both power stages with a switching frequency of 200 kHz. A maximum output power of 6.1 kW results in a volumetric power density of 5.0 kW/L and a gravimetric power density of 3.8 kW/kg when considering the volume and mass of the system including a case.

Silicon Carbide Power MOSFET Model and Parameter Extraction Sequence

A compact circuit simulator model is used to describe the performance of a 2-kV, 5-A 4-H silicon carbide (SiC) power DiMOSFET and to perform a detailed comparison with the performance of a widely used 400-V, 5-A Si power MOSFET. The models channel current expressions are unique in that they include the channel regions at the corners of the square or hexagonal cells that turn on at lower gate voltages and the enhanced linear region transconductance due to diffusion in the nonuniformly doped channel. It is shown that the model accurately describes the static and dynamic performance of both the Si and SiC devices and that the diffusion-enhanced channel conductance is essential to describe the SiC DiMOSFET on-state characteristics. The detailed device comparisons reveal that both the on-state performance and switching performance at 25degC are similar between the 400-V Si and 2-kV SiC MOSFETs, with the exception that the SiC device requires twice the gate drive voltage. The main difference between the devices is that the SiC has a five times higher voltage rating without an increase in the specific on-resistance. At higher temperatures (above 100degC), the Si device has a severe reduction in conduction capability, whereas the SiC on-resistance is only minimally affected

Silicon carbide power MOSFET model and parameter extraction sequence

A compact circuit simulator model is used to describe the performance of a 2-kV, 5-A 4-H silicon carbide (SiC) power DiMOSFET and to perform a detailed comparison with the performance of a widely used 400-V, 5-A Si power MOSFET. The models channel current expressions are unique in that they include the channel regions at the corners of the square or hexagonal cells that turn on at lower gate voltages and the enhanced linear region transconductance due to diffusion in the nonuniformly doped channel. It is shown that the model accurately describes the static and dynamic performance of both the Si and SiC devices and that the diffusion-enhanced channel conductance is essential to describe the SiC DiMOSFET on-state characteristics. The detailed device comparisons reveal that both the on-state performance and switching performance at 25degC are similar between the 400-V Si and 2-kV SiC MOSFETs, with the exception that the SiC device requires twice the gate drive voltage. The main difference between the devices is that the SiC has a five times higher voltage rating without an increase in the specific on-resistance. At higher temperatures (above 100degC), the Si device has a severe reduction in conduction capability, whereas the SiC on-resistance is only minimally affected

A technique to increase the efficiency of high-voltage charge pumps

A charge pump that utilizes a MOSFET body diode as a charge transfer switch is discussed. The body diode is characterized and a body diode model is developed for simulating the charge pump circuit. A 10% increase of voltage gain has been achieved in the proposed switching technique when compared with a traditional Dickson charge pump. The top plate and bottom plate switching technique have also been illustrated to improve the efficiency of the charge pump. A six-stage Dickson charge pump was designed to produce a 19 V output from a 3.3-V supply, using a 4 MHz, two-phase nonoverlapping clock signal driving the charge pump. The design was fabricated in a 0.35-/spl mu/m SOI CMOS process. An efficiency of 79% is achieved at a load current of approximately 19 /spl mu/A.

A high voltage Dickson charge pump in SOI CMOS

An improved charge pump that utilizes a MOSFET body diode as a charge transfer switch is discussed. The body diode is characterized and a body diode model is developed for simulating the charge pump circuit. An increase in voltage pumping gain for a silicon-on-insulator (SOI) Dickson charge pump is demonstrated when compared with a traditional bulk CMOS Dickson charge pump. A 6-stage Dickson charge pump was designed to produce a 20 V output from a 3.3 V supply, using a 4 MHz, two-phase non-overlapping clock signal driving the charge pump. The design was fabricated in a 0.35 /spl mu/m partially depleted SOI CMOS process. An efficiency of 72% is achieved at a load current of approximately 20 /spl mu/A.

A 4H Silicon Carbide Gate Buffer for Integrated Power Systems

A gate buffer fabricated in a 2-μm 4H silicon carbide (SiC) process is presented. The circuit is composed of an input buffer stage with a push-pull output stage, and is fabricated using enhancement mode N-channel FETs in a process optimized for SiC power switching devices. Simulation and measurement results of the fabricated gate buffer are presented and compared for operation at various voltage supply levels, with a capacitive load of 2 nF. Details of the design including layout specifics, simulation results, and directions for future improvement of this buffer are presented. In addition, plans for its incorporation into an isolated high-side/low-side gate-driver architecture, fully integrated with power switching devices in a SiC process, are briefly discussed. This letter represents the first reported MOSFET-based gate buffer fabricated in 4H SiC.

Parameter extraction sequence for silicon carbide schottky, merged PiN Schottky, and PiN power diode models

A detailed parameter extraction sequence for the comprehensive silicon carbide (SiC) power diode model Is presented. The extraction sequence Is applicable to any SiC diode technology. It is demonstrated for a 1.5 kV, 10 A merged PIN Schottky (MIPS); 5 kV, 20 A PiN; 10 kV, 5 A PiN; and the new commercially available 600 V, 1 A and 4 A Schottky diodes.

Investigation of the Suitability of 1200-V Normally-Off Recessed-Implanted-Gate SiC VJFETs for Efficient Power-Switching Applications

A recessed-implanted-gate (RIG) 1290-V normally-off (N-OFF) 4H-SiC vertical-channel JFET (VJFET), fabricated with a single masked ion implantation and no epitaxial regrowth, is evaluated for efficient power conditioning applications. The relationship between the VJFETs on-state resistance and current gain is elucidated. Under high-current-gain operation, which is required for efficient power switching, the 1200-V N-OFF (enhancement mode) VJFET exhibits a prohibitively high on-state resistance. Comparison with 1200-V normally-on VJFETs, fabricated on the same wafer, confirms experimentally that the strong gate-depletion-region overlap required for 1200-V N-OFF blocking is the principal contributor to the prohibitively high specific on-state resistance observed under high-current-gain VJFET operation. Perfecting the 1200-V edge termination structure, which can reduce the theoretical drift specific ON-state resistance from 2.2 to 1.5 mOmega ldr cm2, has a negligible impact in decreasing the channel-dominated 1200-V N-OFF VJFET resistance. The RIG VJFET channel-region optimization simulations (assuming a single commercial implantation and no epitaxial regrowth) revealed that, although aggressively increasing channel doping lowers the resistance, the corresponding reduction in the source mesa width can prohibitively limit manufacturability.

A wide bandgap silicon carbide (SiC) gate driver for high-temperature and high-voltage applications

Limitations of silicon (Si) based power electronic devices can be overcome with Silicon Carbide (SiC) because of its remarkable material properties. SiC is a wide bandgap semiconductor material with larger bandgap, lower leakage currents, higher breakdown electric field, and higher thermal conductivity, which promotes higher switching frequencies for high power applications, higher temperature operation, and results in higher power density devices relative to Si [1]. The proposed work is focused on design of a SiC gate driver to drive a SiC power MOSFET, on a Cree SiC process, with rise/fall times (less than 100 ns) suitable for 500 kHz to 1 MHz switching frequency applications. A process optimized gate driver topology design which is significantly different from generic Si circuit design is proposed. The ultimate goal of the project is to integrate this gate driver into a Toyota Prius plug-in hybrid electric vehicle (PHEV) charger module. The application of this high frequency charger will result in lighter, smaller, cheaper, and a more efficient power electronics system.

1200-V, 50-A, Silicon Carbide Vertical Junction Field Effect Transistors for Power Switching Applications

High-voltage normally-on VJFETs of 0.19 cm2 and 0.096 cm2 areas were manufactured in seven photolithographic levels with no epitaxial regrowth and a single ion implantation event. A self aligned guard ring structure provided edge termination. At a gate bias of -36 V the 0.096 cm2 VJFET blocks 1980 V, which corresponds to 91% of the 12 μm drift layer’s avalanche breakdown voltage limit. It outputs 25 A at a forward drain voltage drop of 2 V (368 A/cm2, 735 W/cm2) and a gate current of 4 mA. The specific on-resistance is 5.4 mΩ cm2. The 0.19 cm2 VJFET blocks 1200 V at a gate bias of -26 V. It outputs 54 A at a forward drain voltage drop of 2 V (378 A/cm2, 755 W/cm2) and a gate current of 12 mA, with a specific on-resistance of 5.6 mΩ cm2. The VJFETs demonstrated low gate-to-source leakage currents with sharp onsets of avalanche breakdown.