Tzu-Chi Huang

Minimized Transient and Steady-State Cross Regulation in 55-nm CMOS Single-Inductor Dual-Output (SIDO) Step-Down DC-DC Converter

A single-inductor dual-output (SIDO) step-down DC-DC converter with continuous conduction mode (CCM) operation is proposed to achieve an area-efficient power management module. The low-voltage energy distribution controller (LV-EDC) can simultaneously guarantee good voltage regulation and low output voltage ripple. With the proposed dual-mode energy delivery methodology, cross regulation in steady-state output voltage ripple, which is rarely discussed, and cross regulation in load transient response are both effectively reduced. In addition, the energy mode transition operation helps obtain the appropriate energy operation mode using the energy delivery paths for dual outputs. Moreover, within the allowable output voltage ripple, the automatic energy bypass (AEB) mechanism can reduce the number of energy delivery paths, thereby ensuring voltage regulation and further enhancing efficiency. The test chip, fabricated in 55-nm CMOS, occupies 1.44 mm2 and achieves 91% peak efficiency, low output voltage ripple, and excellent load transient response for a high-efficiency system-on-a-chip (SoC) integration.

A Battery-Free 217 nW Static Control Power Buck Converter for Wireless RF Energy Harvesting With

A battery-free nano-power buck converter with a proposed dynamic on/off time (DOOT) control can achieve high conversion efficiency over a wide load range. The DOOT control can predict the on/off time at different input voltages without a power consuming zero current detection (ZCD) circuit, as well as suppress static power in idle periods. To adapt to the fluctuations in a harvesting system, the proposed α-calibration scheme guarantees accurate ZCD over process, voltage variation, and temperature (PVT) in the DOOT to improve power conversion efficiency. Furthermore, the adaptive phase lead (APL) mechanism can improve inherent propagation delay attributable to low-power and non-ideal comparator, thus improving load regulation by a maximum of 30 mV. The test chip was implemented in 0.25-μm CMOS process with a die area of 0.39 mm2. Experimental results showed 95% peak efficiency, low static power of 217 nW and good load regulation of 0.1 mV/mA, which are suitable for RF energy harvesting applications.

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Dual dynamic voltage scaling (DVS) techniques employed in single-inductor dual-output (SIDO) converters are used to improve the efficiency of the system-on-a-chip (SoC). One DVS technique for digital circuits is controlled by the SoC processor. This paper presents the analog DVS (ADVS) technique for analog circuits to scale voltage across the power MOSFET of the switchable digital-analog (D/A) low-dropout (LDO) regulator which is the post-regulator cascaded in series with the SIDO converter. The ADVS determines the tradeoff between voltage suppression and efficiency. Furthermore, because of the digital operation of the D/A LDO regulator, the quiescent current is further reduced at light loads while the load current requirement is minimized. In addition, the limitation of the capacitor-free LDO is significantly reduced by a few microamperes. The test chip was fabricated using a 40-nm CMOS process. Experimental results demonstrated switchable D/A LDO regulator operation with peak efficiency at 96.7% in analog operation and a 5-mV output voltage ripple at 120-mA load resulting from the advantage of ripple suppression. The power efficiency could be sustained at a value over 92.57% even when the load current decreased to 1 μA.

-Calibrated Dynamic On/Off Time and Adaptive Phase Lead Control

The continuous built-in resistance detection (CBIRD) is proposed in the switching-based charger system to achieve fast charging. Corresponding to built-in resistance (BIR) variation of Li-ion battery and charging current limitation from input energy, the CBIRD dynamically adjusts the transition voltage at the constant current (CC) mode. As a result, the transition timing from CC mode to the constant voltage (CV) mode can be postponed. Rated large charging current and extended period in CC mode effectively reduce charging time. Besides, the proposed automatic energy deliver control (AEDC) technique considers both loading system and battery status simultaneously to manage charging current according to the loading systems requirement and input supply energy for high efficiency charging. The proposed switching-based charger system was fabricated in 0.25 μm CMOS process and occupied 3 mm2 silicon area. The charger system can save up to 40% of charging time. The charger system achieves 87% of peak power efficiency at a rated 1 A charging current.

A Switchable Digital–Analog Low-Dropout Regulator for Analog Dynamic Voltage Scaling Technique

This paper presented a battery-free energy harvesting system with an auto-startup mechanism to achieve AC power monitoring. The proposed switch capacitor sampler (SCS) technique suppresses the total harmonic distortion (THD) since the energy is derived from the AC power lines. It can improve the performance of the power factor correction (PFC) in the harvesting system to achieve high power utilization. As a result, the proposed method can be used as a smart meter for monitoring or controlling the power delivery decision. A battery-free energy harvesting system with the SCS control technique was implemented by using 0.25-µm CMOS process. The die area is 0.25 mm2. The PF value can be raised to 0.98 with low THD of 17%.

Fast Charging and High Efficiency Switching-Based Charger With Continuous Built-In Resistance Detection and Automatic Energy Deliver Control for Portable Electronics

This paper presents and analyzes a fully digital instruction-cycle-based dynamic voltage scaling (iDVS) power management strategy for low-power processor designs. The proposed iDVS technique is fully compatible with conventional DVS scheduler algorithms. An additional computer aided design-based design flow was embedded in a standard cell library to implement the iDVS-based processor in highly integrated system-on-a-chip applications. The lattice asynchronous self-timed control digital low-dropout regulator with swift response and low quiescent current was also utilized to improve iDVS voltage transition response. Results show that the iDVS-based processor with the proposed adaptive instruction cycle control scheme can efficiently perform millions of instructions per second during iDVS transition. The iDVS-based digital signal processor chip was implemented in a HH-NEC 0.18-μm standard complementary metal-oxide semiconductor. Measurement results show that the voltage tracking speed with 11.6 V/μs saved 53% power.

A battery-free energy harvesting system with the switch capacitor sampler (SCS) technique for high power factor in smart meter applications

The proposed cross-source energy (CSE) harvesting circuit can accept universal energy sources, including AC and DC sources. The buck-boost conversion of CSE harvesting circuit automatically converts AC or DC input into DC output without being limited by universal input voltage range. CSE harvesting circuit provides dual outputs, a regulated output and a battery charging output, to optimally arrange harvest energy with 72.5% of power efficiency. A backup converter is designed to cooperate with CSE harvesting circuit to guarantee voltage stability of the regulated output. The proposed analog iterating-based (AIB) maximum power point tracking (MPPT) technique achieves 94.6% tracking efficiency without complex data calculation and storage compared to previous techniques.

Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings

Magnetic energy harvesting (MEH) circuit for system sustainability and power monitoring system with a novel dual-wire current transformer (DWCT) are proposed in this paper. MEH circuit simultaneously senses and harvests the magnetic energy. DWCT has the benefits of non-invasion measurement (NIM) and is easy to use. The designed direct AC-DC rectifier with maximum power extracting (MPE) control fits the characteristic of magnetic energy source. Thus, 120% harvesting power improvement can be achieved under the same sensing current.

A Direct AC–DC and DC–DC Cross-Source Energy Harvesting Circuit with Analog Iterating-Based MPPT Technique with 72.5% Conversion Efficiency and 94.6% Tracking Efficiency

The magnetic energy harvesting (MEH) circuit and the power monitoring system are proposed in this paper to enlarge the system sustainability on wireless sensing or the monitoring system. The proposed MEH circuit harvests magnetic power on power wires through a power sensing current transformer (CT) and charges power monitoring system. The MEH circuit includes the direct ac-dc rectifier and the maximum power extracting (MPE) control circuit. The direct ac-dc rectifier can directly rectify ac input to the dc output current. The proposed MPE control fits the characteristic of magnetic energy source compared to the conventional resistor emulation maximum power point tracking method. Owing to continuous tracking the maximum power of the CT, 120% harvesting power improvement can be achieved under the same CTs sensing current. Peak efficiency of 82% can be achieved under the sensing current of 8 A. The test chip is fabricated in 0.25 μm CMOS process with an active area of 0.98 mm2.

Non-invasion power monitoring with 120% harvesting energy improvement by maximum power extracting control for high sustainability power meter system

A low cost maximum power point tracking (MPPT) technique is proposed in this paper for high power efficiency in photovoltaic systems to track the maximum power point (MPP). Compared to the various studies of the MPPT topologies, the proposed implementation is achieved by monitoring the power slope conditions of solar panels. The post grid-connected DC-AC inverter helps feedback the transformative power for providing AC power. Experiment results demonstrate the rapid tracking operation of MPP and a high tracking effectiveness of 97.3%.