U.K. Mishra

Microwave performance of AlInAs-GaInAs HEMTs with 0.2- and 0.1- mu m gate length

The millimeter-wave performance is reported for Al/sub 0.48/In/sub 0.52/As-Ga/sub 0.47/In/sub 0.53/As high-electron-mobility transistors (HEMTs) with 0.2- mu m and 0.1- mu m-long gates on material grown by molecular-beam epitaxy on semi-insulating InP substrates. Devices of 50- mu m width exhibited extrinsic transconductances of 800 and 1080 mS/mm, respectively. External f/sub T/ (maximum frequency of oscillation) of 120 and 135 GHz, respectively, were measured. A maximum f/sub T/ of 170 GHz was obtained from a 0.1*200- mu m/sup 2/ device. A minimum noise figure of 0.8 dB and associated gain of 8.7 dB were obtained from a single-stage amplifier at frequencies near 63 GHz.<<ETX>>

High-performance submicrometer AlInAs-GaInAs HEMT's

The performance of long (1.3- mu m) and short (0.3- mu m) gate-length Al/sub 0.48/In/sub 0.52/ As-Ga/sub 0.47/In/sub 0.53/ high-electron-mobility transistors (HEMTs) is reported. Transconductances of 465 and 650 mS/mm, respectively, were achieved. The 0.3- mu m-long gate-length device exhibited an f/sub t/>80 GHz. These results are attributed to the excellent electronic properties of the AlInAs-GaInAs modulation-doped system.<<ETX>>

AlInAs-GaInAs HEMT for microwave and millimeter-wave applications

The status of lattice-matched high-electron-mobility transistors (HEMTs) and pseudomorphic AlInAs-GaInAs grown on In substrates is reviewed. The best lattice-matched devices with 0.1- mu m gate length had a transconductance g/sub m/=1080 mS/mm and a unity current gain cutoff frequency f/sub T/=178 GHz, whereas similar pseudomorphic HEMTs had g/sub m/=1160 mS/mm and f/sub T/=210 GHz. Single-stage V-band amplifiers demonstrated 1.3- and 1.5-dB noise figures and 9.5- and 8.0-dB associated gains for the lattice-matched and pseudomorphic HEMTs, respectively. The best performance achieved was a minimum noise figure of F/sub min/=0.8 dB with a small-signal gain of G/sub a/=8.7 dB. >

The effect of InP substrate misorientation on GaInAs‐AlInAs interface and alloy quality

The quality of GaInAs‐AlInAs epitaxial layers is found to be critically dependent on the degree of (100)‐InP substrate misorientation. The alloy quality of both materials is improved when the substrate is misoriented 4° off the (100). The heterojunction interface quality as determined by the full width at half‐maximum of quantum‐well photoluminescence is also improved when a substrate misoriented by 4° is used. A degradation of both alloy and interface quality as compared to material on (100) InP is observed when the misorientation is 2°. These effects are also observed for strained quantum‐well structures.

Vertical scaling of ultra-high-speed AlInAs-GaInAs HEMTs

The scaling of the vertical dimensions of 0.15- mu m-gate-length Al/sub 0.48/In/sub 0.52/As-Ga/sub 0.47/In/sub 0.53/As high-electron-mobility transistors (HEMTs) to reduce their well-known excessive gate leakage current, premature breakdown voltage, and poor output conductance is discussed. It is found that, with a proper choice of doping densities and layer thicknesses, it is possible to realize very-high-performance AlInAs-GaInAs HEMTs (f/sub T/=160 GHz, f/sub max/=300 GHz for 0.15- mu m*50- mu m devices) with low gate leakage current, high breakdown voltage (7.0 V), and very low DC output conductance (45-mS/mm). The DC output conductance exhibits a very strong dependence on the AlInAs doping-thickness product and appears to be a limiting factor in the device power gain. By reducing the doping-thickness product, it was possible to reduce the output conductance by a factor of 3 and thus increase the power gain cutoff frequency by a factor of 1.7.<<ETX>>

The effect of interface and alloy quality on the DC and RF performance of Ga/sub 0.47/In/sub 0.53/As-Al/sub 0.48/In/sub 0.52/As HEMTs

Ga/sub 0.47/In/sub 0.53/As-Al/sub 0.48/In/sub 0.52/As high-electron-mobility transistors (HEMTs) were fabricated in materials with varying degrees of alloy and interface disorder. The conductivities of the epitaxial layers are highest for material with the smallest amount of interface roughness and lowest for samples with poor-quality interfaces. The transconductances and unity current gain cutoff frequencies of the fabricated devices with 0.2- mu m gates are similarly affected. >

A 2-GHZ three-stage AlInAs-GaInAs-InP HEMT MMIC low-noise amplifier

A three-stage monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) has been fabricated using 0.15- mu m-gate-length, InP-based (AlInAs-GaInAs) high electron mobility transistor (HEMT) technology. The LNA exhibited less than 0.5-dB noise figure and greater than 35-dB gain from 2.25 to 2.5 GHz. The input and output return loss exceeded 15 dB across the band. The results are believed to be the best reported to date for a MMIC amplifier in this frequency range.<<ETX>>

AlInAs/GaInAs on InP HEMT low noise MMIC amplifiers

AlInAs/GaInAs on InP HEMT (high electron mobility transistor) single-stage low-noise MMIC (monolithic microwave integrated circuit) amplifiers have been developed for operation at 12 GHz, 35 GHz and 60 GHz. A noise figure of 0.78 dB with an associated gain of 15 dB was achieved at 12 GHz. This is the lowest noise figure yet reported for a monolithic amplifier at 12 GHz. A noise figure of 1.2 dB with gain greater than 12 dB was obtained from 10 to 14 GHz. At 35.5 GHz, 13 dB gain with 17 dB input return loss was obtained. At 55 GHz, 8 dB gain with more than 12 dB input return loss was obtained.<<ETX>>

Low-temperature buffer AlInAs/GaInAs on InP HEMT technology for ultra-high-speed integrated circuits

A report is presented on the development of a planar low-temperature buffer AlInAs/GaInAs on InP high-electron-mobility transistor (HEMT) technology for use in digital and analog integrated circuits. This technology is attractive for circuit applications because of the high achievable f/sub T/ and f/sub max/, low output conductance and gate leakage current, and reduced susceptibility to backgating effects. Two alternative logic families-UFL and SCFL (source-couple FET logic)-were chosen for the realization of digital circuits. Measurements on the UFL ring oscillators exhibited a minimum gate delay of 13 ps with a power dissipation of 1.1 mW/gate at room temperature. The gate delay rose to 25 ps when the power dissipation increased to 3 mW/gate. This gate delay is expected to drop significantly with reductions in diode level-shift series resistance and improvements in transistor f/sub T/. The most complex SCFL circuit tested was a divide-by-eight counter. The SCFL circuits were configured as flip-flops in the divide-by-eight mode. The circuit operated at a maximum clock rate of 12.5 GHz.<<ETX>>

DC and RF performance of 0.1 mu m gate length Al/sub 0.48/In/sub 0.52/As-Ga/sub 0.38/In/sub 0.62/As pseudomorphic HEMTs

The authors report on the epitaxial layer design, device fabrication, and millimeter-wave performance of lattice-matched and pseudomorphic AlInAs-GaInAs HEMTs (high-electron-mobility transistors). The authors fabricated 0.1- mu m gate length HEMTs using pseudomorphic Al/sub 0.48/In/sub 0.52/As-Ga/sub 0.38/In/sub 0.62/As modulation-doped epitaxial layers and compared them with lattice-matched Al/sub 0.48/In/sub 0.52/As-Ga/sub 0.47/In/sub 0.53/As HEMTs. The pseudomorphic HEMTs demonstrated an external f/sub T/ (current-gain cutoff frequency) of 205 GHz, which is the first demonstration of a transistor with an f/sub T/>200 GHz. The V-band noise figure of an amplifier built with the lattice-matched HEMT and the pseudomorphic HEMTs was 1.3 dB and 1.5 dB, respectively. The associated gain was 9.5 dB and 8.0 dB, respectively.<<ETX>>