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Dive into the research topics where Uwe Muehle is active.

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Featured researches published by Uwe Muehle.


Journal of Applied Physics | 2014

In situ study on low-k interconnect time-dependent-dielectric-breakdown mechanisms

Kong Boon Yeap; Martin Gall; Zhongquan Liao; Christoph Sander; Uwe Muehle; Patrick Justison; Oliver Aubel; Meike Hauschildt; Armand Beyer; Norman Vogel; Ehrenfried Zschech

An in situ transmission-electron-microscopy methodology is developed to observe time-dependent dielectric breakdown (TDDB) in an advanced Cu/ultra-low-k interconnect stack. A test structure, namely a “tip-to-tip” structure, was designed to localize the TDDB degradation in small dielectrics regions. A constant voltage is applied at 25 °C to the “tip-to-tip” structure, while structural changes are observed at nanoscale. Cu nanoparticle formation, agglomeration, and migration processes are observed after dielectric breakdown. The Cu nanoparticles are positively charged, since they move in opposite direction to the electron flow. Measurements of ionic current, using the Triangular-Voltage-Stress method, suggest that Cu migration is not possible before dielectric breakdown, unless the Cu/ultra-low-k interconnect stacks are heated to 200 °C and above.


Journal of Applied Physics | 2015

Ultra-thin ZrO2/SrO/ZrO2 insulating stacks for future dynamic random access memory capacitor applications

Steve Knebel; Milan Pešić; Kyuho Cho; Jaewan Chang; Han-jin Lim; Nadiia Kolomiiets; Valeri Afanas'ev; Uwe Muehle; Uwe Schroeder; Thomas Mikolajick

Aiming for improvement of the ZrO2-based insulator properties as compared to the state-of-the-art ZrO2/Al2O3/ZrO2 stacks beyond 20 nm dynamic random access memory (DRAM) technology applications, ultra-thin (5 nm) ZrO2/SrO/ZrO2 stacks with TiN electrodes deposited by physical vapor deposition are addressed. By replacing the Al2O3 interlayer with SrO, the effective dielectric permittivity of the stack can be increased as indicated by electrical analysis. At the same time, no degradation of the insulating properties of the SrO-containing stacks and minor changes in the reliability, compared to an Al2O3 interlayer, are found. These results are indicating the possibility of further reducing the effective oxide thickness of the ZrO2-based stacks to come close to 0.5 nm for future DRAM capacitors.


Scientific Reports | 2017

In-Situ Stretching Patterned Graphene Nanoribbons in the Transmission Electron Microscope

Zhongquan Liao; Leonardo Medrano Sandonas; Tao Zhang; Martin Gall; Arezoo Dianat; Rafael Gutierrez; Uwe Muehle; Juergen Gluch; Gianaurelio Cuniberti; Ehrenfried Zschech

The mechanical response of patterned graphene nanoribbons (GNRs) with a width less than 100 nm was studied in-situ using quantitative tensile testing in a transmission electron microscope (TEM). A high degree of crystallinity was confirmed for patterned nanoribbons before and after the in-situ experiment by selected area electron diffraction (SAED) patterns. However, the maximum local true strain of the nanoribbons was determined to be only about 3%. The simultaneously recorded low-loss electron energy loss spectrum (EELS) on the stretched nanoribbons did not reveal any bandgap opening. Density Functional Based Tight Binding (DFTB) simulation was conducted to predict a feasible bandgap opening as a function of width in GNRs at low strain. The bandgap of unstrained armchair graphene nanoribbons (AGNRs) vanished for a width of about 14.75 nm, and this critical width was reduced to 11.21 nm for a strain level of 2.2%. The measured low tensile failure strain may limit the practical capability of tuning the bandgap of patterned graphene nanostructures by strain engineering, and therefore, it should be considered in bandgap design for graphene-based electronic devices by strain engineering.


Ultramicroscopy | 2018

Si amorphization by focused ion beam milling: Point defect model with dynamic BCA simulation and experimental validation.

Jin Huang; M. Loeffler; Uwe Muehle; W. Moeller; J.J.L. Mulders; L.F.Tz. Kwakman; W.F. Van Dorp; Ehrenfried Zschech

A Ga focused ion beam (FIB) is often used in transmission electron microscopy (TEM) analysis sample preparation. In case of a crystalline Si sample, an amorphous near-surface layer is formed by the FIB process. In order to optimize the FIB recipe by minimizing the amorphization, it is important to predict the amorphous layer thickness from simulation. Molecular Dynamics (MD) simulation has been used to describe the amorphization, however, it is limited by computational power for a realistic FIB process simulation. On the other hand, Binary Collision Approximation (BCA) simulation is able and has been used to simulate ion-solid interaction process at a realistic scale. In this study, a Point Defect Density approach is introduced to a dynamic BCA simulation, considering dynamic ion-solid interactions. We used this method to predict the c-Si amorphization caused by FIB milling on Si. To validate the method, dedicated TEM studies are performed. It shows that the amorphous layer thickness predicted by the numerical simulation is consistent with the experimental data. In summary, the thickness of the near-surface Si amorphization layer caused by FIB milling can be well predicted using the Point Defect Density approach within the dynamic BCA model.


Microscopy and Microanalysis | 2015

A Study of Gallium FIB induced Silicon Amorphization using TEM, APT and BCA Simulation

Jin Huang; M. Loeffler; Uwe Muehle; Wolfhard Moeller; Hans Mulders; Laurens Kwakman; Ehrenfried Zschech

Crystalline silicon (c-Si) is partially amorphized in Focused Ion Beam (FIB) TEM lamella preparation. A 30kV Ga beam with a small glancing incident results in a 20-30nm amorphous layer [1, 2]. The precise mechanisms remain uncertain and a damage prediction can hardly be made. In this study, a Binary Collision Approximation (BCA) software is employed to simulate c-Si amorphization in various Ga-FIB conditions. These results are compared with experimental data from transmission electron microscopy (TEM) and atom probe tomography (APT) of Si samples prepared by a FEI Helios 660 FIB/SEM system.


Frontiers in Materials | 2018

Thin Bioactive Zn Substituted Hydroxyapatite Coating Deposited on Ultrafine-Grained Titanium Substrate: Structure Analysis

Konstantin A. Prosolov; Olga Belyavskaya; Uwe Muehle; Yurii P. Sharkeev

Nanocrystalline Zn substituted hydroxyapatite coatings were deposited by radiofrequency magnetron sputtering on the surface of ultrafine-grained titanium substrates. Cross section transmission electron microscopy provided information about the morphology and texture of the thin film while in-column energy dispersive X-ray analysis confirmed the presence of Zn in the coating. The Zn substituted hydroxyapatite coating was formed by an equiaxed polycrystalline grain structure. Effect of substrate crystallinity on the structure of deposited coating is discussed. An amorphous TiO2 sublayer of 8 nm thickness was detected in the interface between the polycrystalline coating and the Ti substrate. Its appearance in the amorphous state is attributed to prior to deposition etching of the substrate and subsequent condensation of oxygen-containing species sputtered from the target. This layer contributes to the high coating-to-substrate adhesion. The major P-O vibrational modes of high intensity were detected by Raman spectroscopy. The Zn substituted hydroxyapatite could be a material of choice when antibacterial osteoconductive coating with a possibility of withstanding mechanical stress during implantation and service is needed.


IEEE Transactions on Device and Materials Reliability | 2017

Analysis of the Effect of TSV-Induced Stress on Devices Performance by Direct Strain and Electrical Measurements and FEA Simulations

Armen Kteyan; Uwe Muehle; Martin Gall; Valeriy Sukharev; Riko Radojcic; Ehrenfried Zschech

A well-documented effect of the mechanical stresses generated by 3-D IC packaging on the performance of electrical circuits, in some cases leading to their parametric failure, can be controlled by means of stress assessment EDA tools. Verification and calibration of the layout engineered stress models are traditionally performed on the basis of electrical data demonstrating the stress-induced changes in transistors’ drain currents. This paper demonstrates the validity of such an approach in the case of chip-package interaction (CPI)-induced stresses. Through-silicon vias (TSV) were chosen in this paper as a well-controlled stress source. Specially designed test-structures were used for measurements of TSV-induced strains in FET channels by means of the transmission electron microscopy/convergent beam electron diffraction technique. Measured strains were used for calibrating the developed finite-element analysis model of TSV-induced stress. The calibrated stress model was employed for calculating the TSV-induced drain current changes in the nearby devices in the test structures designed for electrical measurements. The demonstrated good fit between the calculated and measured current changes validates the use of electrical measurements for calibrating CPI stress assessment models.


International Journal of Materials Research | 2015

Preparation and characterization of silicon nanowires using SEM/FIB and TEM

Sayanti Banerjee; Uwe Muehle; Markus Löffler; André Heinzig; Jens Trommer; Ehrenfried Zschech

Abstract Due to the electronic and structural properties of silicon, silicon nanowires have a great potential in nanoscale electronic devices and sensors. Silicon nanowires used for reconfigurable field effect transistors are designed, synthesized and characterized after each step in order to ensure excellent electrical and physical properties of the end product and to study various process parameters. In this study, silicon nanowire based reconfigurable field effect transistors are studied as as-grown “forests”, individually, oxidized and after forming Schottky junctions. The analysis is performed using scanning electron microscopy and transmission electron microscopy. Focused ion beam based preparation was carried out in the case of samples with Schottky junctions. This paper provides a comprehensive description of sample preparation and characterization of the nanowires.


ASME 2016 International Mechanical Engineering Congress and Exposition | 2016

CPI Stress Induced Carrier Mobility Shift in Advanced Silicon Nodes

Valeriy Sukharev; Jun-Ho Choy; Armen Kteyan; Henrik Hovsepyan; Uwe Muehle; Ehrenfried Zschech; Riko Radojcic


Journal of Electronic Packaging | 2017

Carrier Mobility Shift in Advanced Silicon Nodes Due to Chip Package Interaction

Valeriy Sukharev; Jun-Ho Choy; Armen Kteyan; Henrik Hovsepyan; Mark Nakamoto; Wei Zhao; Riko Radojcic; Uwe Muehle; Ehrenfried Zschech

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André Heinzig

Dresden University of Technology

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Jens Trommer

Dresden University of Technology

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Jin Huang

Dresden University of Technology

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M. Loeffler

Dresden University of Technology

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Markus Löffler

Dresden University of Technology

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Sayanti Banerjee

Dresden University of Technology

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