V. Girault

Analytical extraction of thermal conductivities of low k dielectrics for advanced technologies

As the dimensions of IC structures shrink and dissipated power densities increase, thermal considerations have a growing importance in the development of advanced microelectronic components. Optimal thermal management requires the accurate knowledge of the thermal conductivities of their constitutive thin films. Actually, a precise knowledge of these material parameters is essential to predict the thermal behavior of the IC and then to take it into account in reliability issues. The present paper provides an analytical thermal resistance model used to extract the conductivities of fluorinated silicate glass (FSG), phosphorous silicate glass (PSG) and silicate carbide oxide (SiOCH). Joule heating measurements at 25/spl deg/C performed on embedded copper lines have validated this model. Various dielectric stack configurations have been studied to isolate the contribution of each material in the thermal model. From these results, root mean square (rms) currents have been predicted to limit Joule heating in interconnects.

Effect of Joule heating on the determination of electromigration parameters

The use of accelerated electromigration (EM) wafer level reliability (WLR) tests aims at performing tests on a large sample size faster than at package level (PLR). Meanwhile, the correlation of times to failure determined from package level tests and wafer level tests is sometimes not obvious. Therefore, little trust is put in extrapolated lifetime determined from WLR tests. To elucidate this apparent inconsistency, we developed a lifetime model, based on the flux divergence under high thermal gradient at the end of EM line. We found an apparent evolution of the current density exponent n from 1.5 to 2.1 due to the coupling between current density and temperature in WLR test. Besides, no important change of the activation energy Ea is found.

Electromigration multistress pattern technique for copper drift velocity and Black’s parameters extraction

Package electromigration tests were performed on dual damascene copper interconnects issued from the 90, 65 and 45 nm-node technologies. By varying the stress conditions during the steady state regime of the resistance increase, we study drift velocity evolution as a function of the current density j. Thus we show some large deviation of the Blacks law, which assumes a linear dependence of the lifetime with j. Finally we have determined the Blacks exponent n in a broad range of current density j (2.5-50 mA/mum2). For 250 mum long lines, a n=1 is obtained between 10 and 20 mA/mum2, it increases up to 2 for j=2.5 mA/mum2.

Dynamics of Resistance Evolution During Electromigration

The careful analysis of resistance evolution with time during electromigration tests provided valuable information about damascene architecture and intrinsic electromigration behaviour. We found first, that resistance evolution includes an abrupt event, the amplitude of which is usually corresponding to the failure criteria and second, that the height of this step (and sample resistance) is correlated with time to fail. We showed that the evolution of time to step was more likely to be due to the vertical growth of a void which length is making resistance step amplitude varying from sample to sample. Second we found a correlation between sample initial resistance and time to failure that is believed to be due to trench depth. However this effect is widely spread and correlation coefficient is as low as 0.3. These 2 phenomena combined together, increase the standard deviation affecting lifetime. As a matter of fact, resistance increase rate is expected to be directly proportional to void growth rate and copper diffusion coefficient whereas step height is function of the void shape and barrier thickness

Determination of the acceleration factor between wafer level and package level electromigration test

The characterization and monitoring of electromigration performance is usually performed using wafer level or package level tests. These two types of test involve very different temperature gradient and current density conditions. These differences of stress condition may affect the determination of electromigration parameters, namely the activation energy, Ea, and the current exponent, n, as described in the empirical Blacks law: MTF = A.j/sup -n/exp(Ea/kT). The apparent evolution of n and Ea is critical because it complicates the calculation of extrapolated lifetime. To elucidate this apparent inconsistency, we built a numerical model of the flux of matter in a copper line to simulate lifetime and acceleration factor corresponding to wafer and package level electromigration tests. Our numerical model is able to simulate TTF corresponding to electromigration tests on a wide range of current density (two orders of magnitude). The analysis of simulated TTF predicts that the error in Blacks law parameters Ea and n may occur both from wafer level (high current density and Joule heating) and package level (low current density). As a consequence, we recommend taking into consideration temperature gradients as well as the Blech effect to extrapolate lifetime correctly.

Blech effect in dual damascene copper-low k interconnects

The electromigration threshold in copper interconnect is reported in this study. The critical product jLc was first determined for copper-oxide interconnects in the temperature range 250/spl deg/C-350/spl deg/C from package level experiments. It is shown that the product does not significantly change in this temperature range. Then jLc was extracted for copper-low k dielectric (k=2.8) interconnects at 350/spl deg/C. A larger value than for oxide dielectric was found. Finally, a correlation between n values from Blacks model and jL conditions was established for both dielectrics.

Determination of IRMS Rules for 65nm Node Design Foundations and Thermal Effect of Dummies

We propose in the present paper root mean square (RMS) current rules to limit Joule heating in the back end of line (BEOL) of 65nm node circuits. These rules are based on a new analytical thermal resistance model previously determined for 130 and 90nm node BEOL. To confirm the validity of this model through technologies, Joule heating measurements at 110degC were performed on copper lines embedded with SiOC dielectric for the 65nm node technology. Then, the thermal effect of copper dummies was studied

Accurate method for determination of interconnect cross section

Several experimental studies reported an increase of the copper resistivity with decreasing interconnects dimensions (Schafft and Suchle, 1992). However, the accuracy of measurement is limited by the knowledge of sample geometry. As a matter of fact, the geometry of resistors issued from advanced damascene process is varying with process parameters (trench height, diffusion barrier thickness, CMP (chemical mechanical polishing) effect). Taking into consideration Mathiessen empirical relation we established a relation between, resistivity, TCR (temperature coefficient of resistance) and metal cross section to develop an accurate methodology to determine thickness and resistivity of damascene copper samples.

Electromigration in narrow and large damascene copper lines

This paper presents a study on electromigration performances of narrow and wide damascene copper lines with a view to always be aware of the limitations of circuit lifetime with respect to this failure mechanism. It appears that narrow and large lines do not present the same activation energy. Narrow lines are characterized by a rather high activation energy, around 0.90 eV, referring to copper migration at the copper/top barrier interface, whereas large lines present an activation energy around 0.74 eV, apparently referring to copper migration at the grain boundaries. These experimental results suggest a careful choice in interconnect design, depending on the circuit application (digital/analog), to always provide a robust circuit.

Characterization of Electromigration Parameters on Single Device

The careful analysis of resistance evolution with time during electromigration tests provided valuable information about damascene architecture and intrinsic electromigration behavior. On one hand, void length and barrier resistivity can be extracted from the step height, but we have shown that it is sensitive to high accelerated tests. On the other hand, both the activation energy and the current density exponent can be calculated directly from the slope of the progressive increase, on a single device. Such methodology is likely to increase accuracy on Blacks parameters.