Van Huy Nguyen

High Quality Strained Ge Epilayers on a Si0.2Ge0.8/Ge/Si(100) Global Strain-Tuning Platform

High structural quality, compressively strained Ge surface epilayers have been grown on Si(100) substrates of up to 200 mm diameter. The epitaxial growth by industrially compatible reduced pressure chemical vapor deposition proceeded uninterruptedly via an intermediate relaxed Si0.2Ge0.8/Ge buffer. In-depth characterization of the epilayers revealed a relatively smooth surface and a low threading dislocation density. The Ge layers were demonstrated to remain fully strained for thicknesses of more than 100 nm. The high quality of the material and flexibility to choose the Ge layer thickness over a wide range make these heterostructures very attractive for fabricating various electronic and photonic devices

High quality relaxed germanium layers grown on (110) and (111) silicon substrates with reduced stacking fault formation

Epitaxial growth of Ge on Si has been investigated in order to produce high quality Ge layers on (110)- and (111)-orientated Si substrates, which are of considerable interest for their predicted superior electronic properties compared to (100) orientation. Using the low temperature/high temperature growth technique in reduced pressure chemical vapour deposition, high quality (111) Ge layers have been demonstrated almost entirely suppressing the formation of stacking faults (< 107 cm−2) with a very low rms roughness of less than 2 nm and a reduction in threading dislocation density (TDD) (∼ 3 × 108 cm−2). The leading factor in improving the buffer quality was use of a thin, partially relaxed Ge seed layer, where the residual compressive strain promotes an intermediate islanding step between the low temperature and high temperature growth phases. (110)-oriented layers were also examined and found to have similar low rms roughness (1.6 nm) and TDD below 108 cm−2, although use of a thin seed layer did not offer the same relative improvement seen for (111).

Growth of smooth, low-defect germanium layers on (111) silicon via an intermediate islanding process

Epitaxial growth of thick Ge layers on a (111)-Si substrate has been investigated. We demonstrate that the residual compressive strain in a thin, partially relaxed Ge seed layer can be exploited to promote an intermediate islanding step, significantly reducing the threading dislocation density (~3×108 cm-2) and almost entirely suppressing stacking fault formation. The higher Ge growth rate on the 113 sidewalls of the islands compared to the (111) top surface results in a smooth layer with a low rms surface roughness of 2 nm. Such layers have the potential to be extremely important in realizing next-generation high-mobility n-channel transistors.

Calibration of thickness-dependent k-factors for germanium X-ray lines to improve energy-dispersive X-ray spectroscopy of SiGe layers in analytical transmission electron microscopy

We show that the accuracy of energy-dispersive X-ray spectroscopy can be improved by analysing and comparing multiple lines from the same element. For each line, an effective k-factor can be defined that varies as a function of the intensity ratio of multiple lines (e.g. K/L) from the same element. This basically performs an internal self-consistency check in the quantification using differently absorbed X-ray lines, which is in principle equivalent to an absorption correction as a function of specimen thickness but has the practical advantage that the specimen thickness itself does not actually need to be measured.

Effect of growth rate on the threading dislocation density in relaxed SiGe buffers grown by reduced pressure chemical vapour deposition at high temperature

Fully relaxed, strain-tuning Si1-xGex buffers have been grown at very high temperatures of 950-1080 degrees C by reduced-pressure chemical vapour deposition (RP-CVD) as platforms for high quality strained Si layers. It is critical that these buffers have a low threading dislocation density (TDD) to maximize carrier mobility and minimize leakage currents in high performance electronic devices. The influence of the Si1-xGex growth rate on TDD has been investigated for buffers with Ge content x <= 0.5. In contrast to the established understanding, the TDD, in this growth regime, exhibits almost no dependence upon the Si1-xGex growth rate. We suggest that at these high temperatures the gliding arms associated with dislocations have a sufficiently high velocity for the layers to relax even at the highest growth rates. Hence, no benefit is gained from reducing the growth rate, as required at lower growth temperatures to allow the threading arms to glide. The relaxed buffers produced at these high growth rates, nevertheless, have state-of-the-art TDD values of similar to 6 x 10(4) cm(-2) and similar to 1 x 10(5) cm(-2) for Si0.8Ge0.2 and Si0.5Ge0.5 buffers, respectively.

Accuracy of thickness measurement for Ge epilayers grown on SiGe/Ge/Si(100) heterostructure by x-ray diffraction and reflectivity

High-resolution x-ray diffraction rocking curve (RC), x-ray reflectivity (XRR), and transmission electron microscopy (TEM) were used to characterize strained Ge epilayers grown on relaxed SiGe/Ge/Si(100) virtual substrates by reduced pressure chemical vapor deposition. The investigation focused on the reliability and accuracy of thickness measurement by these different techniques. The authors found that both XRR and RC could give reliable values that agree well with TEM results over a wide range of Ge epilayer thicknesses. The best-fit thickness from both XRR and RC is within ±5% of the TEM measurement for a thickness in the range of 10–120 nm, with XRR producing more accurate values than RC. However, neither RC nor XRR could give reliable results for very thin Ge epilayers ( 122 nm) due to surface roughening caused by strain relaxation.

Developments in germanium-on-silicon epitaxy by reduced pressure chemical vapor deposition

High quality epitaxial layers of germanium have been deposited directly on a range of silicon substrates using reduced pressure chemical vapor deposition (RP-CVD). Relaxed Ge layers were realized on (001), (110) and (111) orientations with surface roughness below 2 nm in each case, and below 1 nm for (001). Stacking faults were virtually eliminated, while the threading dislocation density was minimized; for (001) this was 1 × 107 cm-2, whereas for (111) it was highest at 2 × 108 cm-2. With such Ge layers many applications are made possible. Examples given include heterostructures with extremely high hole mobility, both at low- and room temperature, and single photon avalanche diodes.

Understanding the Role of the Low Temperature Seed Layer in the Growth of Low Defect Relaxed Germanium Layers on (111) Silicon by Reduced Pressure CVD

In this work, the role of the low temperature seed layer in more detail is discussed, by analyzing layers grown at a range of temperatures and as function of layer thickness with a combination of analysis techniques including high resolution TEM, atomic force microscopy (AFM) and X-ray diffraction (XRD). The aim of the LT seed is to accommodate all of the lattice mismatch, leaving the HT layer fully relaxed. In practice there is some residual compressive strain which, as the growth temperature is increased for the HT layers, can lead to island formation at the start of these HT layers. These Ge islands can act as sources for further dislocation nucleation and promote dislocation annihilation within their restricted volume. This influences both the dislocation network during the growth and the surface morphology of the final high temperature layer. However, the continued high temperature growth leads to a smoothing effect as the mobile dislocations annihilate and a smooth surface of less than 2 nm rms, although the threading dislocations can also dissociate into stacking faults for (111) oriented growth leading to surface steps.

Investigation of the Thermal Stability of Strained Ge Layers Grown at Low Temperature by Reduced-pressure Chemical Vapour Deposition on Si0.2Ge0.8 Relaxed Buffers

High quality strained Ge (s-Ge) epitaxial layers are a promising candidate to achieve high mobility channel MOSFETs suitable for the 22 nm technology node and beyond, due to the intrinsically higher mobility of Ge compared to Si, and the additional performance enhancements from strain [1]. In order to achieve an s-Ge channel more than a few monolayers thick it is necessary to engineer a relaxed Si1-xGex buffer with a high Ge content (x > 0.5). We have recently reported high quality s-Ge layers grown by RP-CVD at low temperature (T ≤ 450 °C), on a fully relaxed Si0.2Ge0.8 buffer [2]. By using a reverse-grading approach, we achieved a high Ge composition in the buffer, with a smooth surface (rms surface roughness of ~2 nm), low threading dislocations density (~ 4 x 106 cm-2) and much thinner (~ 2.1 μm) than can be achieved with conventional linear grading [3]. In this work, the thermal stability of s-Ge epilayers (up to 80 nm thick) grown on relaxed Si0.2Ge0.8 buffers has been investigated by in-situ annealing in H2 ambient at temperatures up to 650 °C. These temperatures are similar to those currently used during fabrication of advanced CMOS devices. All s-Ge layers were grown at 400 °C using GeH4 gaseous precursor. The relaxation of the annealed layers has been studied using high-resolution XRD reciprocal space maps (RSMs), and was found to depend strongly on both annealing temperature and thickness of the Ge epilayer. Strained Ge layers up to 50 nm thick remained fully strained after annealing at 450 °C, whereas after annealing at 550 °C s-Ge layers thicker than 20 nm were on the onset of relaxation; after annealing at 650 °C all s-Ge layers showed significant relaxation with defects clearly visible at the Si0.2Ge0.8/Ge interface. All annealed s-Ge layers exhibited higher surface roughness than s-Ge control samples without annealing (rms ~ 2 nm). Annealing at 450 °C resulted in only a slight increase in surface roughness (rms ~ 3 nm), almost independent of s-Ge thickness. However, annealing at 550 °C and 650 °C resulted in significant surface roughening (with maximum rms values of 5 nm and 35 nm, respectively) due to the formation of Ge islands, which were observed by AFM. At these higher temperatures, the surface roughness of the s-Ge layers was found to be thickness dependent, with a Ge smoothing effect observed for layers greater than 50 nm. These results are particularly important for the fabrication of s-Ge MOSFETs, for which the surface passivation prior to gate stack formation is critical to the performance of the device. Based on the results presented here, the thermal budget should be kept below 550 °C to avoid relaxation and roughening of the s-Ge epilayer, which could degrade the device performance.

Compressively strained Ge channel heterostructures grown by RP-CVD for the next generation CMOS Devices

Due to its superior electronic properties Ge is thought to be one of the major candidates for the p-channel of future CMOS devices. In particular, the room-temperature Ge hole mobility is the highest among elementary and compound semiconductor materials. Additionally, the presence of strain pronouncedly enhances the transport properties of the carriers. Significant progress has recently been reported in enhancing carrier transport in heterostructures that contain a compressively strained Ge channel layer. Mobile holes confined in an optimized compressively strained 20 nm thick Ge channel have been shown to exhibit a very high room-temperature drift mobility of 3100 cm/Vs [1]. Those structures were grown by solid-source molecular beam epitaxy (SS-MBE) on a Si(100) substrate via an intermediate relaxed SiGe buffer. Epitaxial growth of such structures by a mass production technique like reduced pressure chemical vapour deposition (RP-CVD) is of great interest; however, the growth mechanism of Ge and SiGe epilayers by RP-CVD is different from by SS-MBE and requires separate research. In this work, we present compressively strained Ge layers which have been grown by RP-CVD on relaxed reverse linearly graded (RLG) Si0.2Ge0.8/Ge/Si(100) virtual substrates (VS), which we developed recently [2]. This relatively thin, high Ge content VS demonstrates good structural properties, i.e. relatively low RMS surface roughness and low threading dislocation density (TDD). It makes this VS an excellent platform to study the growth kinetics and strain relaxation of Ge epilayers.