Victor Soler

Impact of boron diffusion on oxynitrided gate oxides in 4H-SiC metal-oxide-semiconductor field-effect transistors

An alternative gate oxide configuration is proposed to enhance the SiO2/SiC interface quality, enabling high mobility 4H-SiC lateral metal-oxide-semiconductor field-effect transistors (MOSFETs). The gate oxide is prepared by the combination of rapid thermal oxidation in N2O ambient, boron diffusion into SiO2, and plasma enhanced chemical vapor deposition of tetraethyl orthosilicate oxide. Capacitance-voltage (C-V) and conductance-voltage (G-V) measurements on fabricated capacitors reveal a reduction of both interface trap and near interface oxide trap densities. The fabrication of MOSFETs with very high field-effect mobility (μfe) values, up to 160 cm2/V s, is enabled. Several channel orientations, with respect to the wafer flat {11 2¯0}, have been studied to check μfe values and isotropy. Higher μfe values are obtained for a channel orientation of 90°. Boron distribution is studied by secondary ion mass spectrometry (SIMS) and time of flight SIMS. We propose that the combination of boron and nitrogen ind...

High-voltage SiC devices: Diodes and MOSFETs

This paper reviews recent achievements on high-voltage SiC-based devices aimed at Wind Power and Solid-State Transformer applications. SiC diodes with voltage ranges between 1.7kV and 9kV have been designed and fabricated. On the other hand, SiC JFETs and, specially, SiC MOSFETs are also under development, and preliminary prototypes of 3.3 kV SiC MOSFETs are reported.

4.5kV SiC MOSFET with boron doped gate dielectric

A new process based on Boron diffusion step to improve the SiO2/SiC interface quality is presented in this work. Surprisingly, Boron, a p-type dopant and small size atom, generates similar apparent improvements as previous oxide treatments based on large size atoms, n-type or deep levels dopants. This process has been applied to a thermal oxide grown to fabricate large area (up to 25mm2) 4.5kV 4H-SiC VDMOS. Fabricated devices show a significant improvement in terms of channel effective mobility, on-resistance, and 3rd quadrant behavior in comparison with counterparts without Boron oxide treatment.

Improved 4H-SiC N-MOSFET interface passivation by combining N 2 O oxidation with Boron diffusion

A new oxide configuration for the development of high mobility 4H-SiC lateral MOSFETs is proposed in this work. The oxide is composed by a rapid thermal oxidation (RTO) in N2O environment, a Boron diffusion into the SiO2 and a PECVD TEOS deposited oxide, in order to improve the interface quality. The obtained MOSFETs show very high peak field effect mobilities ranging from 80 up to more than 170 cm2V-1s-1 in MOSFETs with higher channel length than the tested transistors. The physical (SIMS) and electrical analysis of the oxide and SiC surface reveals that the Boron has not diffused into the SiC. This is most probably due to the high concentration of Nitrogen at the interface generated during the N2O oxidation.

New trends in high voltage MOSFET based on wide band gap materials

Recent advances and new trends in high voltage SiC based MOSFETs are analyzed. The main focus is done on design optimization strategies for reducing the on-state resistance. Gate oxide treatments for improving the interface quality resulting in a lower channel resistance are reviewed as well as solutions for lowering the JFET and bulk resistance components. The 3rd quadrant operation, short-circuit capability and switching performance are analyzed together with design strategies for their improvement. Finally, the limits of high voltage MOSFETs are outlined and future power devices to overcome the MOSFETs limits in ultra-high voltage applications are presented.

SiC Power Switches Evaluation for Space Applications Requirements

We have evaluated several SiC power switches available on the market, by defining and performing a global test campaign oriented to Space applications requirements, in order to define their main benefits but also the limits of current SiC technology. This allowed to identify a number of target applications where SiC could be used as a technology push for a new generation of space electronics units. Silicon devices qualified for space systems above 600V for the switches and 1200V for the rectifiers are not available due to performances limitations of Si. Among the typical static and dynamic characterization, we have performed temperature and power stress and HTRB tests. More remarkably, we have carried out a first batch of total dose and heavy ions radiation experiments on 3 types of power switches: normally-on JFET, normally-off JFET and power MOSFET. Due to its higher stability and radiation hardness, the normally-on JFET is today the more adequate and reliable switch for the space applications.

Complementary p-Channel and n-Channel SiC MOSFETs for CMOS Integration

The fabrication of CMOS devices in SiC is important for both a higher operating temperature capability and the integration with SiC power devices. In this work, n-channel and p-channel signal MOSFETs have been successfully fabricated using a process technology fully compatible with our HV SiC VDMOS technology. A preliminary SiC CMOS inverter has been also integrated. The gate oxide configuration includes the use of Boron to improve SiO2/SiC. Electrical characterizations have been carried out at room temperature and a summary of the results is presented. The biggest challenge is to balance the n-type and p-type MOSFETs not only in area but also in Vth value.

High channel mobility in 4H-SiC N-MOSFET using N 2 O oxidation combined with Boron diffusion treatment

A new gate oxide configuration, including a Boron treatment, is reported in this work. It is designed to improve the SiO2/SiC interface quality in 4H-SiC N-MOSFETs. The obtained results show high field effect mobilities up to 160 cm2/Vs. The fabricated devices have also been undergone to a BSI stress up to 20 h at room temperature showing good threshold voltage stability. The physical (SIMS) analysis of the oxide and SiC surface reveals that Boron has not diffused into the SiC.

Experimental investigation of SiC 6.5kV JBS diodes safe operating area

This paper presents an experimental investigation of the dynamic performance of SiC 6.5kV JBS diodes. Using a hybrid Si SPT IGBT/SiC JBS diodes combination, we have analyzed the turn-off behavior limits of SiC JBS diodes and compared the result against a state-of-the-art Si PiN diode. The experimental results show that the JBS diodes can handle about 40A/chip at 125°C before going into thermal runaway. This maximum turn-off current value increases by about 50% when the diodes are operated at room temperature. The diodes dI/dt behaviour appear to be virtually independent of the DC-link voltage (at RG=18Ω). The comparison between turn-off curves for 6.5kV SiC and Si diodes shows that the use of SiC JBS diodes reduces the reverse recovery losses by more than 98%.

Impact of channel mobility improvement using boron diffusion on different power MOSFETs voltage classes

SiC planar VDMOS of three voltages ratings (1.7kV, 3.3kV and 4.5kV) have been fabricated using a Boron diffusion process into the thermal gate oxide for improving the SiO2/SiC interface quality. Experimental results show a remarkable increase of the effective channel mobility which increases the device current capability, especially at room temperatures. At high temperatures, the impact of the Boron treatment is lower since the major contribution of the drift layer to the on-resistance. In addition, the intrinsic body diode characteristics approximate to that of an ideal PiN diode, and the blocking capability is not compromised by the use of Boron for the gate oxide formation.