Vilem Kledrowetz

Practically implemented electronically controlled CMOS voltage differencing current conveyor

This paper presents electronically controllable concept of the CMOS voltage differencing current conveyor (VDCC) for precise operations with large dynamic range and for robust automotive applications. It was designed and fabricated in ON Semiconductor 0.7 um I2T100 technology. Because of unique internal structure, not only value but also polarity of transconductance stage of VDCC can be controlled electronically by external DC voltage. Moreover, adjusting of resistance of current input terminal is possible by DC bias current. This contribution includes also the most important characteristics of manufactured chip obtained by laboratory measurement of prototype sample and obtained controllability ranges are compared with Cadence Spectre simulations.

Handheld potentiostat with embedded ASIC

The article deals with the design of handheld potentiostat instrument utilizing an ASIC. It briefly shows complete system and control software as well. The FPGA is used to generation of the measuring potential waveform and for communication with AD and DA converters and with PC. The designed ASIC that forms the core of the instrument consists of an output buffer and a current to voltage converter with selectable measurement range. The reached parameters of the ASIC are presented as well.

Low-voltage Fully Differential Difference Transconductance Amplifier

A new complementary metal-oxide-semiconductor (CMOS) structure for fully differential difference transconductance amplifier (FDDTA) is presented in this study. Thanks to using the non-conventional quasi-floating-gate (QFG) technique the circuit is capable to work under low-voltage supply of 0.6 V with extended input voltage range and with class AB output stages. The QFG multiple-input metal-oxide-semiconductor transistor is used to reduce the count of the differential pairs that needed to realise the FDDTA with simple CMOS structure. The static power consumption of the proposed FDDTA is 40 μW. The FDDTA was designed in Cadence platform using 0.18 μm CMOS technology from Taiwan Semiconductor Manufacturing Company (TSMC). As an example of applications a three-stage quadrature oscillator and fifth-order elliptic low-pass filter are presented to confirm the attractive features of the proposed CMOS structure of the FDDTA.

Low-Voltage Diode-Less Rectifier Based on Fully Differential Difference Transconductance Amplifier

This paper presents a voltage-mode low-voltage low-power diode-less rectifier with only one active element, the fully differential difference transconductance amplifier (FDDTA). The multiple-input floating-gate MOS (FG-MOS) transistor is used to build the differential pairs of the FDDTA resulting in the reduced count of transistors, circuit simplicity and the capability to work under low-voltage supply with extended input voltage range. The rectifier was designed with 0.9V voltage supply and 8μW power consumption, hence it is suitable for wearable electronics and biomedical applications. The simulation results obtained from the Cadence platform using 0.18μm TSMC CMOS technology show good performances for the designed circuit.

Inductance simulator based on dual controlled CMOS voltage differencing current conveyor

The voltage differencing current conveyor (VDCC) based lossless/lossy inductance simulator with the advantage of extended (i.e. dual-controlled) range of equivalent inductance value and possibility of reconfiguration of polarity is presented in this study. These unconventional features are available because of newly designed CMOS structure of VDCC element. VDCC was fabricated lately in I2T100 0.7 um technology. Relevant VDCC-based inductance simulators are compared briefly with attention to controllability of inductance value especially. Theoretical expectations are compared with experimental results of an inductance simulator prototype obtained in laboratory measurements of proposed circuit based mainly on VDCC chip and its unique features are provided.

Design of the 16bit ΔΣ converter for sensor signal processing

The paper deals with a design of the 16-bit MASH Delta-sigma (ΔΣ) converter utilizing switched capacitor technique (SC). The attention was paid to reach 16bit of ENOB resolution even the same precision of STF in band. This requirement is crucial to evaluation of the signal amplitude independently on its frequency. Multistage structure of two second order CIDIDF modulator was used. The system consists of continuous time amplifier, switched Delta-sigma modulator and decimation digital filter. The ONSemi I3T25 350nm CMOS technology was used for the design. The value of SNDR = 106.5 dB (ENOB = 17.4 bits) was achieved.

Reconfigurable 1 st order filters based on differential voltage input and a single current output transconductance multiplier

This paper deals with reconnection-less electronically reconfigurable filtering applications of the differential voltage input and single current output transconductance multiplier. A voltage-mode and mixed-mode filter solutions are presented and their electronically configurable features (change of transfer type and adjustment) are verified by simulations in a Cadence Spectre simulator with I2T100 0.7 μm technology.

SC ΣΔ converter for vibration sensor processing system

The paper deals with a design of the 12-bit sigma delta (ΣΔ) modulator using switched capacitor technique (SC). It is a part of the system for vibration sensor output processing. Processing system consists of pre-amplifier, delta-sigma modulator and decimation digital filter. Detailed description of design process of the ΣΔ modulator is described in article. The design process starts by parameter requirements determination, continuing by structure proposal, design method and coefficients selection, selecting of compensation methods and concluding by design on the chip. ONSemi I2T100 700 nm CMOS technology was used for design. The value of SNDR = 81.1 dB (ENOB = 13.2 bits) was achieved.