Vinod Kumar Agrawal

Docker container security via heuristics-based multilateral security-conceptual and pragmatic study

In this paper we attempt to provide unified security and privacy multilateral security architecture for cloud services stack, using key latest technology via LxC in general and Docker containers in specific. Docker is one of the first to use LxC at such a large scale, but LxC is not a very new concept, it is around for quite some time. Docker container service is a key Platform as a Service (PaaS) based engine. Unified layered cloud computing multilateral security implementation addresses the potential risks associated with cloud computing environment. It also specifies when, at what time, where, and how to apply security controls. Unified Design includes the structured connection between the components of cloud ecosystem for basket and bucket of unified cloud-based hybrid services using micro service oriented venture architectural services realized in terms of PAAS using Docker container as a service. We surveyed various industry/academic professionals and based on our experience we tried to understand the challenges they faced while using the cloud system. We tried to understand the security challenges, incidents, story pieces, accidents, experience they faced while designing, implementing and using the cloud services/resources virtually via online. This work helps to assess the security design and architecture quality using multilateral security framework for Docker container. We try to present the architecture using OSI/TCP/IP stack model with reference to Cloud service stack model and deployment stack model and try to propose the balanced multilateral security prototype with reference to Docker Container security architecture.

Design of Dedicated Reversible Quantum Circuitry for Square Computation

Quantum computation is modeled by quantum circuits. All the quantum operations are reversible so the quantum circuits can be built using reversible logic gates. Reversible computing is the emerging technology, its major role is in the field of quantum computing, optical computing, and design of low power nanocircuits. The most frequently used computational unit for digital signal processing and multimedia applications is multiplier. To compute square of an operand, regular multipliers are used in general. This paper proposes a dedicated quantum circuit for computing square of an operand efficiently compared to the existing multipliers in the literature. The squaring unit is mathematically modeled and its metrics quantum cost, garbage outputs and ancilla input, gate count are calculated. We compared the proposed design with the existing multipliers to compute square and found that proposed square unit is efficient in terms of quantum cost, garbage outputs, ancilla inputs and gate count. The proposed reversible square circuit has 63% to 85% improvement of quantum cost, garbage outputs, ancilla inputs and gate count over existing reversible multiplier circuits.

Performance estimation of conventional and reversible logic circuits using QCA implementation platform

The size of complementary metal oxide semiconductor (CMOS) transistor keep shrinking to increase the density on chip in accordance with Moores Law [1]. The scaling affect the device performance due to constraints like heat dissipation and power consumption [3], further scaling would hit the physical limitation [16]. Effortshave been made to come up with the new device alternative to CMOS, to continually improve the development of electronic device. Quantum Dot Cellular Automata (QCA) technology is one such promising alternative, that can overcome the scaling issue and offer fast computation performance, high density, and low power consumption. Another emerging technology that can help in reducing heat dissipation is reversible logic. This paper proposes the idea of implementing reversible combinational circuits and square computation circuits using QCA architecture. The designs are captured and simulated using QCA Designer software, performance of each designs namely area and energy are compared for conventional and Reversible QCA design.

An Exact approach for Complete Test Set Generation of Toffoli-Fredkin-Peres based Reversible Circuits

Reversible logic has gained interest of researchers worldwide for its ultra-low power and high speed computing abilities in the future quantum information processing. Testing of these circuits is important for ensuring high reliability of their operation. In this work, we propose an ATPG algorithm for reversible circuits using an exact approach to generate CTS (Complete Test Set) which can detect single stuck-at faults, multiple stuck-at faults, repeated gate fault, partial and complete missing gate faults which are very useful logical fault models for reversible logic to model any physical defect. Proposed algorithm can be used to test a reversible circuit designed with k-CNOT, Peres and Fredkin gates. Through extensive experiments, we have validated our proposed algorithm for several benchmark circuits and other circuits with family of reversible gates. This algorithm produces a minimal and complete test set while reducing test generation time as compared to existing state-of-the-art algorithms. A testing tool is developed satisfying the purpose of generating all possible CTS’s indicating the simulation time, number of levels and gates in the circuit. This paper also contributes to the detection and removal of redundant faults for optimal test set generation.

Design and evaluation of FPGA based frequency demodulators

Communication systems are extensively used in a large number of applications such as radar, aerospace, naval/maritime communication, mobile communication and many more. The most important module in designing communication system includes design of modulators and demodulators. Frequency modulation (FM) is widely used for various applications ranging from radio communication to on-board systems for aerospace and spacecraft applications. FM demodulators are used to demodulate the FM signals transmitted from such systems. In this paper, a novel attempt is made to use Goertzel algorithm for FM demodulation and its performance is compared with the system designed using Fast Fourier Transform (FFT). Also a reusable Goertzel block based FM demodulator is proposed which reduces the hardware resources on increasing the number of frequencies to be detected. All the above mentioned systems are implemented on a Xilinx Virtex-5 board and their results are reported. 60-82% of hardware resources are saved on using proposed reusable Goertzel block based demodulator, which inturn saved the power consumption of the proposed design.

Towards Realizing the Secured Multilateral Co-Operative Computing Architectural Framework

Innovative approaches for securing the computing systems have intense inference for our understanding of technological, societal, economical, and political phenomena in making guiding principles, policies, rules and security implementations. The model presented here is based on cooperative and collaborative multilateral relationship among the shared business community partners. The sole responsibility for the securing and maintenance of their own virtualized dedicated boxes with jointly hosted data centers distributed geographically is equally, vested with service consumers and vendors. Inspired by multilateral techniques used in army and health care applications, this model is a conceptual and empirical tool aimed, rather depicting a particular set of observed situations or making predictions. It is aimed is to develop our understanding of the fundamental mechanisms driving the security implementations of existing methods and provide the MCF - multilateral collaborative co-operative framework. This MCF demonstrates an interrelated multilayered virtualized architectural framework for computing utility using virtualization platform. We try to demonstrate qualitatively and empirically the proposed architecture works well for a wide range of workloads and devices belonging to multi tenants with varied security needs. This work is compared with currently existing virtualization platform security framework and avail the novelty of the proposed ontology and framework.

Wireless sensor node for green environment

Environment pollution has become a very big menace to human beings and awareness is required among the citizens to contribute for green environment. Polluted air is harmful for human beings and the biosphere, on the whole. Details about the effects of air pollutants on human beings for different concentrations are reported in this paper, which confirms that there is an urgent need to design a low-cost wired or wireless sensor node to monitor air pollution and the same can be employed for monitoring other sources of environment pollution too. The proposed module can be easily adapted in two-wheelers, four-wheelers and other automobiles enabling the drivers and passengers to get an idea of air pollutant content around them.

An empirical hunt for ally co-operative cloud computing utility

A secured “co-operative cloud computing utility”, is a shared set of unique and virtually interconnected system assets. These, computing services, are accessed globally using thin clients and handheld devices through standard collective GUI, anytime, at any location upon payment of specified usage charges. This multi-ally computing utility perks up the advanced facilities to the existing assets. The security and privacy controlling of this utility (data centers, and data storage) is uniformly, vested with service patrons and suppliers, both stakeholders with shared responsibility of security implementation using multilateral relationship among them. In this paper, we propose the ontology of this vicinity, which demonstrates an interrelated layered architecture for a secured co-operative galactic computing utility. This computing architecture is proposed empirically based on our understanding and survey with various industry/academic professionals. We tried to understand the challenges they faced while using the cloud system. So, we conceptually propose this ally architecture which consists of multi-layer with multi-lateral co-operative multi-factor balanced security framework with common business interests along with shared responsibility among the stakeholders. Also we try to prove empirically multilateral balanced security which in-turn increases the strong defense measures among the multi-laterally allied bunch of users.

Reversible Radix-4 booth multiplier for DSP applications

Power dissipation has become the major concern for circuit design and implementation. Reversible Logic is the best alternative to Irreversible Logic in terms of low power consumption. Circuits designed using reversible logic have a wide array of applications. The Quantum Cost, Garbage Outputs, Ancillary Inputs and Delay are some of the parameters of reversible circuits that can be used to determine their efficiency and compare them with existing works. Optimization of these parameters are highly essential. Garbage Outputs is an important parameter that must be considered. This paper presents a design for a Reversible Radix-4 Booth Multiplier that is optimized in Garbage Cost and Ancillary inputs. The design proposed is capable of both signed and unsigned multiplication. The optimization in Garbage Cost ensures lower heat dissipation. The Encoded Booth Algorithm or Radix-4 Booth Algorithm reduces the number of partial products generated in signed multiplication to half the number generated using a Radix-2 signed multiplier making it suitable for Digital Signal Processors. The design proposed is compared to existing multiplier circuits and the parameters are tabulated.

Design and Analysis of Reversible Binary and BCD Adders

Reversible logic in recent times has attracted a lot of research attention in the field of Quantum computation and nanotechnology due to its low power dissipation capability. Adders are one of the basic components in most of digital systems. Optimization of these adders can improve the performance of the entire system. In this work we have proposed designs of reversible Binary and BCD adders. Ripple carry adder, conditional adders for binary addition and regular and flagged adders for BCD addition. The proposed adder designs are optimized for quantum cost, Gate count and delay. The effectiveness of the negative control Toffoli and Peres gates in reducing quantum cost, delay and gate count is explored. Due to this the adder performance increases along with area optimization which will make these designs useful in future low power Reversible computing.