Virgilio Valente

A Tripolar Current-Steering Stimulator ASIC for Field Shaping in Deep Brain Stimulation

A significant problem with clinical deep brain stimulation (DBS) is the high variability of its efficacy and the frequency of side effects, related to the spreading of current beyond the anatomical target area. This is the result of the lack of control that current DBS systems offer on the shaping of the electric potential distribution around the electrode. This paper presents a stimulator ASIC with a tripolar current-steering output stage, aiming at achieving more selectivity and field shaping than current DBS systems. The ASIC was fabricated in a 0.35-μ m CMOS technology occupying a core area of 0.71 mm2. It consists of three current sourcing/sinking channels. It is capable of generating square and exponential-decay biphasic current pulses with five different time constants up to 28 ms and delivering up to 1.85 mA of cathodic current, in steps of 4 μA, from a 12 V power supply. Field shaping was validated by mapping the potential distribution when injecting current pulses through a multicontact DBS electrode in saline.

Wideband Fully-Programmable Dual-Mode CMOS Analogue Front-End for Electrical Impedance Spectroscopy

This paper presents a multi-channel dual-mode CMOS analogue front-end (AFE) for electrochemical and bioimpedance analysis. Current-mode and voltage-mode readouts, integrated on the same chip, can provide an adaptable platform to correlate single-cell biosensor studies with large-scale tissue or organ analysis for real-time cancer detection, imaging and characterization. The chip, implemented in a 180-nm CMOS technology, combines two current-readout (CR) channels and four voltage-readout (VR) channels suitable for both bipolar and tetrapolar electrical impedance spectroscopy (EIS) analysis. Each VR channel occupies an area of 0.48 mm2, is capable of an operational bandwidth of 8 MHz and a linear gain in the range between −6 dB and 42 dB. The gain of the CR channel can be set to 10 kΩ, 50 kΩ or 100 kΩ and is capable of 80-dB dynamic range, with a very linear response for input currents between 10 nA and 100 μA. Each CR channel occupies an area of 0.21 mm2. The chip consumes between 530 μA and 690 μA per channel and operates from a 1.8-V supply. The chip was used to measure the impedance of capacitive interdigitated electrodes in saline solution. Measurements show close matching with results obtained using a commercial impedance analyser. The chip will be part of a fully flexible and configurable fully-integrated dual-mode EIS system for impedance sensors and bioimpedance analysis.

A CMOS Smart Temperature and Humidity Sensor with Combined Readout.

A fully-integrated complementary metal-oxide semiconductor (CMOS) sensor for combined temperature and humidity measurements is presented. The main purpose of the device is to monitor the hermeticity of micro-packages for implanted integrated circuits and to ensure their safe operation by monitoring the operating temperature and humidity on-chip. The smart sensor has two modes of operation, in which either the temperature or humidity is converted into a digital code representing a frequency ratio between two oscillators. This ratio is determined by the ratios of the timing capacitances and bias currents in both oscillators. The reference oscillator is biased by a current whose temperature dependency is complementary to the proportional to absolute temperature (PTAT) current. For the temperature measurement, this results in an exceptional normalized sensitivity of about 0.77%/°C at the accepted expense of reduced linearity. The humidity sensor is a capacitor, whose value varies linearly with relative humidity (RH) with a normalized sensitivity of 0.055%/% RH. For comparison, two versions of the humidity sensor with an area of either 0.2 mm2 or 1.2 mm2 were fabricated in a commercial 0.18 μm CMOS process. The on-chip readout electronics operate from a 5 V power supply and consume a current of approximately 85 μA.

Output stage of a current-steering multipolar and multisite deep brain stimulator

Clinical deep brain stimulation (DBS) is based on the use of cylindrical electrodes driven in monopolar or bipolar configurations. The simulation field spreads symmetrically around the electrode modulating both targeted and non-targeted neural structures. Recent advances have focused on novel stimulation techniques based on the use of high-density segmented electrodes, which allow current-steering and field-shaping capability. This paper presents the architecture of a multi-channel current-steering stimulator output stage that allows for monopolar, bipolar, tripolar and quadripolar multi-site stimulation. The core of the output stage comprises N independent high-compliance current drivers (HCCDs), capable of delivering up to 1.5 mA complementary currents in 10 different current ranges. Each of the N HCCDs can drive up to 8 adjacent electrode contacts thanks to a 2-32 multiplexer controlled by a 5-32 decoder. The HCCD was designed in a HV 0.18μm CMOS process. The circuits were simulated in Cadence Spectre and simulated results are presented in the paper.

A High-Power CMOS Class-D Amplifier for Inductive-Link Medical Transmitters

Powering of medical implants by inductive coupling is an effective technique, which avoids the use of bulky implanted batteries or transcutaneous wires. On the external unit side, class-D and class-E power amplifiers (PAs) are conventionally used, thanks to their high efficiency at high frequencies. The initial specifications driving this study require the use of multiple independent stimulators, which imposes serious constraints on the area and functionality of the external unit. An integrated circuit class-D PA has been designed to provide both small area and enhanced functionality, the latter achieved by the addition of an on-chip (PLL) a dead-time generator and a phase detector. The PA was designed in a 0.18-μm CMOS high-voltage process technology and occupies an area of 9.86 mm2. It works at frequencies up to 14 MHz and 30-V supply and efficiencies higher than 80% are obtained at 14 MHz. The PA is intended for a closed-loop transmitter system that optimizes power delivery to medical implants.

Towards a closed-loop transmitter system with integrated class-D amplifier for coupling-insensitive powering of implants

The efficiency of an inductive power transfer link is greatly affected by misalignment between the coils, caused by the patients movement, after implantation. In this paper we present the preliminary design of a coupling-insensitive system with an integrated class-D transmitter, suitable for powering epidural stimulation implants. The operation of the system is based on closed-loop modulation of the power delivered to the implant, to compensate for losses of coupling between coils after implantation. An integrated transmitter with efficiencies above 90% was designed to operate between 1 MHz and 14 MHz. The circuit design employs 0.18-um high-voltage CMOS technology. Simulations are presented to verify the operation of the circuit.

Electric field focusing and shifting technique in deep brain stimulation using a dynamic tripolar current source

Deep brain stimulation (DBS) is a widely accepted clinical tool adopted for the treatment of a number of motor disorders. Despite its clinical efficacy, its underlying mechanisms have not been yet fully understood. One major issue that we identify as partly responsible for this lack of understanding is related to the poor control over the size, shape and location of the distribution of the depolarizing field around the electrode. With this and a parallel work the authors are proposing to develop and implement techniques that would allow for some degree of control over the distribution of the potential fields. This paper presents the application to DBS of a technique based on a tripolar current source configuration, with adjustable current flow through the lateral (anodic) branches of the tripole. The behavior of potential fields in the tissue were simulated by adopting FEM models of DBS electrode implanted in brain tissue. The profiles of simulated and measured fields were in agreement and they have shown how a dynamic tripolar current source can be adopted to obtain increase the focus and control the location of distribution of the fields around the electrode.

Frequency Splitting Analysis and Compensation Method for Inductive Wireless Powering of Implantable Biosensors

Inductive powering for implanted medical devices, such as implantable biosensors, is a safe and effective technique that allows power to be delivered to implants wirelessly, avoiding the use of transcutaneous wires or implanted batteries. Wireless powering is very sensitive to a number of link parameters, including coil distance, alignment, shape, and load conditions. The optimum drive frequency of an inductive link varies depending on the coil spacing and load. This paper presents an optimum frequency tracking (OFT) method, in which an inductive power link is driven at a frequency that is maintained at an optimum value to ensure that the link is working at resonance, and the output voltage is maximised. The method is shown to provide significant improvements in maintained secondary voltage and system efficiency for a range of loads when the link is overcoupled. The OFT method does not require the use of variable capacitors or inductors. When tested at frequencies around a nominal frequency of 5 MHz, the OFT method provides up to a twofold efficiency improvement compared to a fixed frequency drive. The system can be readily interfaced with passive implants or implantable biosensors, and lends itself to interfacing with designs such as distributed implanted sensor networks, where each implant is operating at a different frequency.

A dedicated electrode driving ASIC for epidural spinal cord stimulation in rats

This paper discusses the design of an application-specific integrated circuit (ASIC) suitable for mounting on a multi-electrode array for epidural spinal cord stimulation in rats. The ASIC acts as a demultiplexer, driving 12 electrodes on the array in any configuration. It is capable of routing biphasic constant current pulses of up to 1 mA to high impedance loads (with a maximum output voltage swing of approximately 25 V) and is small enough to be implanted into a rats spinal column. Communication with its driver is achieved via 3 wires to minimize the number of interconnections. The circuit was implemented in a 0.18-μm high-voltage CMOS technology occupying a core area of 0.36 mm2. Power dissipation is about 110 μW. Post-layout simulations are presented which show the correct operation of the system.

CMOS analog power meter and delay line for automatic efficiency optimization in medical power transmitters

Inductive powering is an efficient method to wire-lessly transfer power to an implant. On the transmitter side, a power amplifier (class-D or class-E) is used to convert DC power, from a supply unit, into AC power, which can be transferred across the inductive link. At frequencies conventionally used for powering implants, the efficiency of a Class-D power amplifier is highly dependent on the dead time between the switching of the low-side and the high-side switches. Closed-loop techniques can then be adopted to automatically set the appropriate dead time. This paper addresses this issue by presenting the conceptual design of an analog CMOS closed-loop automatic efficiency optimization circuit for class-D PAs, consisting of an analog power meter and a 13-bit programmable delay line. The circuits have been designed in a 0.18μm CMOS technology and simulated using Cadence Spectre.