Viswanathan Subramanian

A 60 GHz SiGe-HBT Power Amplifier With 20% PAE at 15 dBm Output Power

A monolithic power amplifier (PA) operating in the 60 GHz band is presented. The circuit has been designed utilizing an advanced 0.25 SiGe-heterojunction bipolar transistor (HBT) technology, featuring npn transistors with and . A two-stage cascode architecture has been chosen for the implementation. Design techniques and optimization procedure are explained in detail. Measurements show a small signal gain of 18.8 dB and an output power of 14.5 dBm under 1 dB gain compression at 61 GHz. At this frequency, the saturated output power is 15.5 dBm and the peak power added efficiency (PAE) is 19.7%. To our knowledge, this is the highest PAE reported so far for a monolithic 61 GHz PA in SiGe-HBT technology.

Local Positioning for Wireless Sensor Networks

This workshop paper gives an overview of local positioning and tracking principles for wireless sensor networks including recent results of the European project RESOLUTION (reconfigurable systems for mobile local communication and positioning). Measurements of a first demonstrator applying a frequency modulated continuous wave (FMCW) radar principle are presented. The unlicensed ISM band around 5.8 GHz, 150 MHz bandwidth and less than 25 mW effective isotropic radiated transmit power are used. Excellent 3-D positioning accuracies in the order of 4 cm in an anechoic chamber and 18 cm in a conference hall with strong multipath and area of 800 m2 are measured. Furthermore, the results of optimized radio frequency integrated circuits and a suitable compact flash card are outlined.

Novel Broadband Wilkinson Power Combiner

This paper describes a new hybrid wideband architecture of a two-stage Wilkinson power combiner/divider using additional capacitive and inductive elements in both stages. The combiner/divider shows a bandwidth from 0.3 GHz up to 2.8 GHz with an insertion loss of less than 0.2 dB and an isolation of about 10 dB. The new combiner topology, design process and results are being discussed

Analysis and characterization of microstrip structures up to 90 GHz in SiGe BiCMOS

In this work electromagnetic analysis and experimental verification of integrated microstrip transmission lines on silicon substrates have been performed up to 90 GHz. Several microstrip lines of different width and length have been realized on a five metal layer silicon substrate together with a commercial SiGe HBT process. All structures have been analyzed using a 2.5D electromagnetic simulation environment. The results of the EM simulation are compared with measurements. De-embedding techniques have been applied on the measured results to remove probe pad and other parasitic effects. Line parameters like characteristic impedance, propagation constant and effective permittivity are determined from de-embedded structures. The dependency of these quantities on various design parameters will be presented.

Low Noise 24 GHz CMOS Receiver for FMCW Based Wireless Local Positioning

This work demonstrates a fully integrated 24 GHz CMOS receiver targeted for low power and compact wireless sensor nodes utilizing FMCW radar for wireless local positioning. The receiver incorporates a highly integrated low noise amplifier, passive mixer and on-chip transformer balun for single-to-differential conversion of LO. The receiver chip has been realized in a 130 nm CMOS technology. At 24 GHz RF the measured receiver performance includes a power conversion gain of 16.5 dB, a noise figure of 5.3 dB, an input power at 1 dB compression point of -26 dBm and an IIP3 of -15 dBm. The complete receiver chip consumes 18 mW from a 1.2 V power supply with 13 mW for the LNA and 5 mW for the output IF buffer. The chip area is 0.7 mm2. The realized receiver compares the best 24 GHz CMOS receiver realizations published so far.

A 60 GHz SiGe HBT Chip Set

A 60 GHz SiGe HBT chipset for high speed wireless communication systems has been developed. The functionalities of LNA, up-converter, down-converter and PA have been realized with good performance. Design strategy, achieved results and comparison with state-of-the-art work will be presented. The work proves that single chip integration of the whole 60 GHz RF-frond-end will be possible using silicon based technologies.

Systematic design and development procedures for a successful CMOS LNA implementation

Through this work we highlighted and demonstrated the significance of an algorithmic way of design and development of CMOS LNAs at 5 GHz. The systematic design led to very good measured performances of 14 dB gain, 1.78 dB noise figure, 10 dB return loss both at the input and output and a high linearity of-3 dBm of IP3 under 5.4 mW power consumption. These results compare the best performances reported in 5 GHz CMOS LNAs. Further it was shown, that this design and development approach is able to achieve state-of- the-art measured performances with very good agreement with the simulated results.

A 60 GHz Monolithic Upconversion Mixer in SiGe HBT Technology

A 60 GHz monolithic upconversion mixer using a 0.25 mum SiGe-HBT technology with fT and fmaxap200 GHz is demonstrated in this work. The mixer is based on the Gilbert micromixer principle. It has broadband matched single-ended IF and LO inputs. An active LO balun is implemented on-chip to convert the single-ended LO signal into a differential one for driving the Gilbert cell. A shorted stub is inserted to the current source of the balun to improve the common mode rejection. A push-pull balun is used to convert the differential output into a single-ended one. Thus, the IF, LO and RF ports are single-ended facilitating the on-wafer measurements. At 0 dBm applied LO power the fully integrated upconversion micro mixer has a conversion gain of -6.5 dB and 0 dBm of input power under 1 dB gain compression where IF, LO and RF frequencies are at 5 GHz, 55 GHz and 60 GHz. Supply voltage and current consumption were 3.3 V and 24 mA, respectively. To the best of our knowledge, this is the first reported highly linear 60 GHz upconversion micromixer in SiGe-HBT technology.

60 GHz SiGe LNA

A monolithic low-noise-amplifier operating in the 60 GHz band is presented. The circuit has been designed utilizing an advanced 0.25 mum SiGe BiCMOS technology, featuring npn transistors with fT and fmax ap 200 GHz. A two stage cascode architecture has been chosen for the implementation. Design techniques and optimization procedure are explained in detail. Measurements show a gain of 18 dB at 61 GHz, which compare reasonably the simulated results. The circuit consumes 7.5 mA from a 2.7 V supply and active chip area is 0.45 mm2.

60 GHz SiGe HBT downconversion mixer

This work presents an active downconverter targeted for integration in 60 GHz high speed data communication RF front-ends. The designed downconverter has been realized in 0.25 mum SiGe BiCMOS technology with ft around 200 GHz. The downconverter consists of a single balanced mixer with an on-chip balun for differential to single ended conversion. High linearity and bandwidth are the main design goals rather than high gain. A clear-cut investigation of the applied bottom up design approach was presented with emphasis on modeling the critical on-chip signal path interconnects, matching and filtering components. The design and applied methodologies will be justified by comparing the measured and simulated performances. At 60 GHz an input 1-dB power compression of -5 dBm, 2.5 dB conversion gain and a gain variation around 2 dB from 50 to 70 GHz, are measured. Current consumption of the mixer core is 4.7 mA from a 3.3 V supply and the active chip area is 0.48 mm2.