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Dive into the research topics where Vladimir F. Drobny is active.

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Featured researches published by Vladimir F. Drobny.


international solid-state circuits conference | 2007

A Passive UHF RFID Transponder for EPC Gen 2 with -14dBm Sensitivity in 0.13μm CMOS

Raymond E. Barnett; Ganesh K. Balachandran; Steve Lazar; Brad Kramer; George Vincent Konnail; Sribhotla Rajasekhar; Vladimir F. Drobny

A passive RFID transponder conforming to the EPC Gen 2 standard is presented, including an RF and analog front-end, EEPROM, and a digital processing core and features a unique RF sampled analog random number generator to support the required anti-collision protocol. Fabricated in 0.13mum CMOS, the 0.55mm2 IC functions at a sensitivity of -14dBm using an 860-to-960MHz carrier at 40-to-160kb/s RX data rates.


Ion Implantation Technology. 2002. Proceedings of the 14th International Conference on | 2002

Activation behavior of BF 2 + implants in RTP annealed silicon

Vladimir F. Drobny; Ki S. Chang; Derek W. Robinson

The sheet resistance (Rs) initially decreases with increasing BF2+ dose for implants exceeding the amorphization dose. This trend reverses after the implanted dose reaches a certain limit. Further dose increase results in a higher Rs and a deeper junction, without offering additional benefits. Fluorine gettered at implant-induced defect sites is responsible for this undesired behavior. Experimental results show that gettered fluorine and boron-fluorine bonds, formed at heavily damaged crystal sites, reduce boron activation.


Archive | 2001

Carbon doped epitaxial layer for high speed CB-CMOS

Vladimir F. Drobny; Dennis D. Liu


Archive | 2005

Thin film resistors integrated at two different metal interconnect levels of single die

Eric W. Beach; Vladimir F. Drobny; Derek W. Robinson


Archive | 2001

Epitaxial cleaning process using HCL and N-type dopant gas to reduce defect density and auto doping effects

Vladimir F. Drobny; Kevin X. Bao


Archive | 2008

EPITAXIAL DEPOSITION-BASED PROCESSES FOR REDUCING GATE DIELECTRIC THINNING AT TRENCH EDGES AND INTEGRATED CIRCUITS THEREFROM

Vladimir F. Drobny; Amitava Chatterjee; Phillipp Steinmann; Rick L. Wise


Archive | 2007

Method and Schottky diode structure for avoiding intrinsic NPM transistor operation

Vladimir F. Drobny


Archive | 2008

METHODS FOR REDUCING GATE DIELECTRIC THINNING ON TRENCH ISOLATION EDGES AND INTEGRATED CIRCUITS THEREFROM

Amitava Chatterjee; Seetharaman Sridhar; Xiaoju Wu; Vladimir F. Drobny


Archive | 2008

Schottky diode with minimal vertical current flow

Vladimir F. Drobny; Derek W. Robinson


Archive | 2005

THIN FILM RESISTORS INTEGRATED AT A SINGLE METAL INTERCONNECT LEVEL OF DIE

Eric W. Beach; Vladimir F. Drobny; Derek W. Robinson

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