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Dive into the research topics where Vladimir Marinkovic is active.

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Featured researches published by Vladimir Marinkovic.


field programmable logic and applications | 2012

Stimulation board for automated verification of touchscreen-based devices

Ivan Kastelan; Vladimir Marinkovic; Radomir Dzakula; Nikola Vranic; Vukota Pekovic

This paper presents preliminary results of the research with the goal of designing a system for automated verification of touchscreen-based devices. The proposed system is based on electrical stimulation of touch-screens, as opposed to the mechanical stimulation nowadays used in such systems. Stimulation is performed by the FPGA-based stimulation board which touches the screen with the long conductor connected to the ground. It simulates the electrical field distortion similar to the distortion induced by introducing the finger to the electrical field of the touch-screen. The long conductor is disconnected from the screen electrically, with the use of a transistor. Controlling the on/off state of the transistor controls whether the conductor touches the screen or not. Preliminary results show that such electrical stimulation of touch-screens is possible, but further research is needed to improve the reliability of the stimulation board.


telecommunications forum | 2012

Protocol independent remote controller emulator for automated testing of multiple DTV/STB

Vladimir Marinkovic; Ivan Kastelan; Nikola Vranic; Zoran Marceta; Vukota Pekovic

This paper proposes a new scheme for DTV/STB remote controller emulator (RCE), which enables automatic control of the DTV/STB devices under test from independent test hardware/software platform. Specifically, the proposed RCE sets the DTV/STB device in particular state within the automatic functional verification system during the test procedure. Besides, it has the ability to record the remote controller (RC) commands sent to the device (history of commands sent by the user), which can be used for debugging the DTV/STB devices when their functionality failure is detected. The proposed RCE is neither dependant on the RC nor the DUT.


engineering of computer based systems | 2013

Selection and Prioritization of Test Cases by Combining White-Box and Black-Box Testing Methods

Sandra Kukolj; Vladimir Marinkovic; Miroslav Popovic; Szabolcs Bognár

In this paper, we present a methodology that combines both white-box and black-box testing, in order to improve testing quality for a given class of embedded systems. The goal of this methodology is generation of test cases for the new functional testing campaign based on the test coverage information from the previous testing campaign, in order to maximize the test coverage. Test coverage information is used for selection of proper test cases in order to improve the quality of testing and save available resources for testing. As an output, a set of test cases is produced. Generated test cases are processed by the test Executor application that decides whether results have passed or failed, based on the results of image grabbing, OCR text extraction, and comparison with expected text. The presented methodology is finally validated by means of a case-study targeting an Android device. The results of the case study are affirmative and they indicate that the proposed methodology is applicable for testing embedded systems of this kind.


engineering of computer based systems | 2011

An Approach to Parallelization of Sequential C Code

Nikola Vranic; Vladimir Marinkovic; Miodrag Djukic; Miroslav Popovic

Massive parallel computing (MPC) originally appeared in the arena of multi-core processors and graphic processing units with parallel computing architecture. Nevertheless, most embedded software is still written in C, therefore C code parallelization is being subject of many ongoing R&D efforts. The most prominent approaches to parallelization of C code include Intel Cilk Plus, OpenCL, vfAnalyst, etc. The objective of this paper is to contribute to the automatic parallelization of existing sequential C code, without any source code modifications/annotations, by proposing two appropriate algorithms for parallelization, Block algorithm, and Operation based algorithm.


Acta Cybernetica | 2014

Code Coverage Measurement Framework for Android Devices

Ferenc Horváth; Szabolcs Bognár; Tamás Gergely; Róbert Rácz; Árpád Beszédes; Vladimir Marinkovic

Software testing is a very important activity in the software development life cycle. Numerous general black- and white-box techniques exist to achieve dierent goals and there are a lot of practices for dierent kinds of software. The testing of embedded systems, however, raises some very special constraints and requirements in software testing. Special solutions exist in this field, but there is no general testing methodology for embedded systems. One of the goals of the CIRENE project was to fill this gap and define a general testing methodology for embedded systems that could be specialized to dierent environments. The project included a pilot implementation of this methodology in a specific environment: an Android-based Digital TV receiver (Set-Top-Box). In this pilot, we implemented method level code coverage measurement of Android applications. This was done by instrumenting the applications and creating a framework for the Android device that collected basic information from the instrumented applications and communicated it through the network towards a server where the data was finally processed. The resulting code coverage information was used for many purposes according to the methodology: test case selection and prioritization, traceability computation, dead code detection, etc. The resulting methodology and toolset were reused in another project where we investigated whether the coverage information can be used to determine locations to be instrumented in order to collect relevant information about software usability. In this paper, we introduce the pilot implementation and, as a proof-ofconcept, present how the coverage results were used for dierent purposes.


engineering of computer-based systems | 2012

Automatic Set-Top Box Menu Navigation Scheme for STB Menu Functional Verification

Vladimir Zlokolica; Nebojsa Milutinovic; Vladimir Marinkovic; Vukota Pekovic; Jan Zloh

An increased complexity of current Set-Top Box (STB) solutions is accompanied by more difficult verification of wide range of supporting functionalities. Due to large number of the STB functionalities the menu of the STB, which is considered as the main tool for the STB control, is of more complex structure. The complexity of the STB menu structure makes both manual and automatic control of the STB more difficult, which is crucial for efficient STB functional verification. This paper proposes a new solution for automated error free navigation through the STB menu for effective functional verification of the STB. The proposed testing solution is based on the existing Black-box testing (BBT) system for testing STB, by specially designed functional drivers. The BBT is customizable, easy to use, cost effective automated solution for system testing of STB. The testing approach for automatic error free navigation through STB menu is based on the constructed software-wise menu structure that enables automatic setting of the STB in a desired STB state, given the extracted string content of the current STB state and the target menu item. Specifically, in proposed scheme the STB menu is automatically navigated from the start to the target state iteratively until the current and the target state are found to be equal. The proposed testing solution provides greater testing efficiency and reliability for the STB functional verification as a result of automatic navigation through the STB menus, which reduces the amount of manual test-case generation.


engineering of computer based systems | 2013

Parallel Processing of Multichannel Video Based on Multicore Architecture

Branislav Kordic; Vladimir Marinkovic; Miroslav Popovic; Vukota Pekovic

Parallel processing and multi-core architectures are being accepted in all segments of industry caused by the need for better performance in real-time and non-real-time systems. This paper presents an implementation of parallel processing system for multichannel video on a multicore architecture using different building blocks. Black Screen Detection algorithm is used for digital image processing. The implemented system was validated by means of a particular case study. Experimentally obtained results are related to analysis of the system scalability, in terms of processing speed up as a function of the number of cores that participate in the processing. Also, due to the specific memory architecture, the influence of a ping-pong mechanism has been analyzed. Based on these results, the use of multi-core architecture for parallel processing to achieve significantly better performance of the target class of embedded systems is justified.


conference on computer as a tool | 2013

A method for creating the operational profile of TV/STB device to be used for statistical testing

Vladimir Marinkovic; Branislav Kordic; Miroslav Popovic; Vukota Pekovic

This paper presents a comprehensive analysis of the integration process of statistical methodology for testing the system using tools like MaTeLo in Black-Box Testing system for automated testing. Through the specific example of testing a digital TV receiver, all the steps in testing process are analyzed: creation of devices operational profile (i.e. usage model) with the emphasis on determining the probability of transitions between states, automatic test case generation, test execution, and the analysis of results obtained by the MaTeLo tool.


engineering of computer-based systems | 2012

A Task Tree Executor Architecture Based on Intel Threading Building Blocks

Miroslav Popovic; Miodrag Djukic; Vladimir Marinkovic; Nikola Vranic

Software systems based on service oriented architecture principles, which manage critical infrastructures, are typical environments where proper parallel data processing is one of the essential goals to achieve. Designers of such systems are normally expected to optimize the system performance and/or introduce new functionalities by evolving the existing system architecture. Our aim of this paper was to optimize system performance of a SOA-based control system by evolving the architecture of the particular service component within the system, which is responsible for complex calculations on large-scale graph models, under near to real time restrictions. This service component transforms system models into task trees, which are then executed by the runtime library that is referred to as the Task Tree Executor (TTE). The goal of this paper was to introduce finer grained parallelism, thus better multicore CPU utilization, by evolving TTE architecture in such a way that novel architecture executes TTE tasks as Intel TBB tasks rather than Win32/Linux threads, which was the case for the previous TTE architecture. The experimental evaluation based on measuring time needed for TTE reliability estimation, by statistical usage tests, shows that novel TTE architecture provides the speedup of around 8 times, on average, over the previous one. Although the focus of the paper is on a particular component, of a particular system, the approach that we took should be applicable on a broader class of SOA-based systems.


telecommunications forum | 2015

One solution of the accurate summation using fixed-point accumulator

Jelena Jankovic; Milos Subotic; Vladimir Marinkovic

The accurate summation is algorithm for summing floating-point numbers with reduced rounding errors. This paper presents one solution of accurate summation problem using fixed-point accumulator. Implemented algorithm is compared with others and has performances and precision comparable with the best existing algorithms.

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