W.J. Ooms

Field effect transistors with SrTiO3 gate dielectric on Si

SrTiO3 has been grown epitaxially by molecular beam epitaxy on Si. The capacitance of this 110 A dielectric film is electrically equivalent to less than 10 A of SiO2. This structure has been used to make capacitors and metal oxide semiconductor field effect transistors. The interface trap density between the SrTiO3 and the Si is 6.4×1010 states/cm2 eV and the inversion layer mobility is 221 and 62 cm2/V s for n- and p-channel devices, respectively. The gate leakage in these devices is two orders of magnitude smaller than a similar SiO2 gate dielectric field effect transistor.

Epitaxial oxide thin films on Si(001)

Over the years, the development of epitaxial oxides on silicon has been a great technological challenge. Amorphous silicon oxide layer forms quickly at the interface when the Si surface is exposed to oxygen, making the intended oxide heteroepitaxy on Si substrate extremely difficult. Epitaxial oxides such as BaTiO3 (BTO) and SrTiO3 (STO) integrated with Si are highly desirable for future generation transistor gate dielectric and ferroelectric memory cell applications. In this article, we review the recent progress in the heteroepitaxy of oxide thin films on Si(001) substrate by using the molecular beam epitaxy technique at Motorola Labs. Structural, interfacial and electrical properties of the oxide thin films on Si have been characterized using in situ reflection high energy electron diffraction, x-ray diffraction, spectroscopic ellipsometry, atomic force microscopy, Auger electron spectroscopy, x-ray photoelectron spectroscopy, high-resolution transmission electron microscopy, high-resolution transmissi...

Two-dimensional growth of high-quality strontium titanate thin films on Si

Most semiconductor materials such as Si, Ge, and GaAs are subject to oxidation when exposed to oxidants. This results in difficulties in the heterointegration of epitaxial oxides on these semiconductors. Even though certain oxides may be thermodynamically stable when placed in contact with semiconductors, direct epitaxy of these oxides encounters kinetic difficulties due to the loss of epitaxy caused by the formation of an amorphous oxide at the interface. In this article, we address some important issues on the heteroepitaxy of oxides on semiconductors and show a stepped growth method that utilizes the kinetic characteristics of the growth process to suppress the oxidation of the substrate surface and thereby achieve oxide films with a high degree of crystallinity. The epitaxy of high-quality SrTiO3 (STO) thin films directly on Si was achieved. The chemical and structural properties of the STO/Si interface were evaluated in situ using reflection high-energy electron diffraction, x-ray photoelectron spect...

GaAs MESFETs fabricated on Si substrates using a SrTiO 3 buffer layer

Heteroepitaxial growth of GaAs on an Si substrate has been achieved through the use of crystalline SrTiO/sub 3/ (STO) and amorphous SiO/sub 2/ buffer layers. The buffer layers serve to accommodate some of the lattice mismatch between the substrate and the GaAs epilayers. Field-effect transistors fabricated in the GaAs epilayers show performance comparable to similar devices fabricated on GaAs substrates. The mobility in the GaAs/STO/Si sample is 2524 cm/sup 2//Vs compared to a GaAs/GaAs sample with mobility of 2682 cm/sup 2//Vs. A 0.7 /spl mu/m gate length device has I/sub d max/ of 367 mA/mm and G/sub m max/ of 223 mS/mm. These devices also have good RF performance with f/sub max/ of 14.5 GHz and class AB power density of 90 mW/mm with an associated power-added efficiency of 38% at 1.9 GHz. This RF performance is within experimental error of similar devices fabricated on GaAs substrates. Preliminary reliability results show that after 800 h at 200/spl deg/C, the GaAs/STO/Si sample showed 1.2% degradation in drain current.

Mechanism of cleaning Si(100) surface using Sr or SrO for the growth of crystalline SrTiO3 films

A method for removing SiO2 and producing an ordered Si(100) surface using Sr or SrO has been developed. In this technique, a few monolayers of Sr or SrO are deposited onto the as-received Si(100) wafer in an ultrahigh vacuum molecular-beam epitaxy system. The substrate is then heated to ∼800 °C for about 5 min, the SiO2 is removed to leave behind a Sr- or SrO-terminated ordered Si(100) surface. This Sr- or SrO-terminated Si(100) surface is well suited for the growth of crystalline high-k dielectric SrTiO3 films. Temperature programmed desorption measurements were carried out to understand the mechanism of removing SiO2 from Si(100) using Sr or SrO. The species we observed coming off the surface during the temperature cycle were mainly SiO and O, no significant amount of Sr containing species was observed. We conclude that the SiO2 removal is due to the catalytic reaction SiO2+Sr(or SrO)→SiO(g)+O+Sr(or SrO). The reaction SiO2+Si→2SiO(g) at the SiO2/Si interface is limited and the pit formation is suppressed. The main roles that Sr or SrO play during the oxide removal process are catalysts promoting SiO formation and passivating the newly exposed Si surface, preventing further etching and the formation of pits in the substrate.A method for removing SiO2 and producing an ordered Si(100) surface using Sr or SrO has been developed. In this technique, a few monolayers of Sr or SrO are deposited onto the as-received Si(100) wafer in an ultrahigh vacuum molecular-beam epitaxy system. The substrate is then heated to ∼800 °C for about 5 min, the SiO2 is removed to leave behind a Sr- or SrO-terminated ordered Si(100) surface. This Sr- or SrO-terminated Si(100) surface is well suited for the growth of crystalline high-k dielectric SrTiO3 films. Temperature programmed desorption measurements were carried out to understand the mechanism of removing SiO2 from Si(100) using Sr or SrO. The species we observed coming off the surface during the temperature cycle were mainly SiO and O, no significant amount of Sr containing species was observed. We conclude that the SiO2 removal is due to the catalytic reaction SiO2+Sr(or SrO)→SiO(g)+O+Sr(or SrO). The reaction SiO2+Si→2SiO(g) at the SiO2/Si interface is limited and the pit formation is suppresse...

Epitaxial perovskite thin films grown on silicon by molecular beam epitaxy

Thin film perovskite-type oxide SrTiO3 has been grown epitaxially on Si(001) substrate by molecular beam epitaxy. Reflection high energy electron diffraction and x-ray diffraction analysis indicate high quality SrTiO3 heteroepitaxy on Si substrate with SrTiO3(001)//Si(001) and SrTiO3[010]//Si[110]. The SrTiO3 surface is atomically as smooth as the starting substrate surface, with a root mean square roughness of 1.2 A observed by atomic force microscopy. The thickness of the amorphous interfacial layer between SrTiO3 and Si has been engineered to minimize the device short channel effect. An effective oxide thickness <10 A has been obtained for a 110 A thick dielectric film. The interface state density between SrTiO3 and Si is 6.4×1010 cm−2 eV−1, and the inversion layer carrier mobilities are 221 and 62 cm2 V−1 s−1 for n- and p-channel metal–oxide–semiconductor devices with 1.2 μm effective channel length, respectively. The gate leakage in these devices is two orders of magnitude smaller than a comparable S...

Development of high dielectric constant epitaxial oxides on silicon by molecular beam epitaxy

Thin films of perovskite-type oxide SrTiO 3 have been grown epitaxially on Si(001) substrates using molecular beam epitaxy. Using reflection high energy electron diffraction (RHEED) we have determined the optimum growth conditions for these type of oxides directly on silicon. Also, observations of RHEED during growth and X-ray diffraction (XRD) analysis indicate that high quality heteroepitaxy on Si takes place with SrTiO 3 (001)//Si(001) and SrTiO 3 [010]//Si[110]. Thin SrTiO 3 layers grown directly on Si were used as the gate dielectric for the fabrication of MOSFET devices. An effective oxide thickness < 10 A has been obtained for a 110 A thick SrTiO 3 dielectric film with interface state density around 6.4 x 10 10 cm -2 eV -1 , and the inversion layer carrier mobilities of 220 and 62 cm 2 V -1 s -1 for NMOS and PMOS devices, respectively.

Interface characterization of high-quality SrTiO3 thin films on Si(100) substrates grown by molecular beam epitaxy

Single-crystal SrTiO3 has been grown on Si(100) using molecular beam epitaxy (MBE). The growth conditions, especially at the initial stage of nucleation, have a great impact on the SrTiO3/Si interface. A regrowth of an amorphous interfacial layer as thick as 23 A has been observed and identified as a form of SiOx. This is a direct result of an internal oxidation during the growth of the STO film due to the oxygen diffusion and reaction with the silicon substrate at the interface. The optimization of the deposition process in terms of growth temperature and oxygen partial pressure has led to an interfacial layer as thin as 11 A. Metal oxide semiconductor (MOS) capacitors with an equivalent oxide thickness tox of 12 A and a leakage current of 2×10−4 A/cm2 have been obtained for a 50 A SrTiO3.

The (3×2) phase of Ba adsorption on Si(001)-2×1

Abstract The initial stages and surface structures of the (3×2) phase of Ba adsorption on an Si(100)-2×1 surface held at 900°C have been studied by low-energy electron diffraction, Auger electron spectroscopy, and ultra-high vacuum scanning tunneling microscopy (STM). At low coverages ( 1 6 ML) , the Ba atoms form atomic chains across the Si dimer rows by occupying valley bridge sites, as well as on fourfold sites by replacing Si dimers and exhibiting a local (3×2) phase, with the 3×-phase along the Si dimer row direction. Two different configurations for the (3×2) phase, namely, mono- and dimer-Ba models, are proposed based on the STM images. Below a coverage of 1 6 ML , the (3×2) phase is formed by single Ba atoms at fourfold sites by replacing original Si dimers. For a Ba coverage of 1 3 ML, the (3×2) phase is formed by buckled Ba dimers, as revealed by high-resolution STM images.

Properties of Epitaxial SrTiO 3 Thin Films Grown on Silicon by Molecular Beam Epitaxy

Single crystalline perovskite oxides such as SrTiO 3 (STO) are highly desirable for future generation ULSI applications. Over the past three decades, development of crystalline oxides on silicon has been a great technological challenge as an amorphous silicon oxide layer forms readily on the Si surface when exposed to oxygen preventing the intended oxide heteroepitaxy on Si substrate. Recently, we have successfully grown epitaxial STO thin films on Si(001) surface by using molecular beam epitaxy (MBE) method. Properties of the STO films on Si have been characterized using a variety of techniques including in-situ reflection high energy electron diffraction (RHEED), ex-situ X-ray diffraction (XRD), spectroscopic ellipsometry (SE), Auger electron spectroscopy (AES) and atomic force microscopy (AFM). The STO films grown on Si(001) substrate show bright and streaky RHEED patterns indicating coherent two-dimensional epitaxial oxide film growth with its unit cell rotated 450 with respect to the underlying Si unit cell. RHEED and XRD data confirm the single crystalline nature and (001) orientation of the STO films. An X-ray pole figure indicates the in-plane orientation relationship as STO[100]//Si[110] and STO(001)// Si(001). The STO surface is atomically smooth with AFM rms roughness of 1.2 AA. The leakage current density is measured to be in the low 10 −9 A/cm 2 range at 1 V, after a brief post-growth anneal in O 2 . An interface state density D it = 4.6 × 10 11 eV −1 cm −2 is inferred from the high-frequency and quasi-static C-V characteristics. The effective oxide thickness for a 200 A STO film is around 30 A and is not sensitive to post-growth anneal in O 2 at 500-700°C. These STO films are also robust against forming gas anneal. Finally, STO MOSFET structures have been fabricated and tested. An extrinsic carrier mobility value of 66 cm 2 V −1 1 s −1 is obtained for an STO PMOS device with a 2 μm effective gate length.