W.V. McLevige

GaAs/AlGaAs heterojunction bipolar transistors for integrated circuit applications

Molecular-beam epitaxy (MBE) and ion implantation were used to fabricate GaAs/AlGaAs heterojunction bipolar transistors with buried wide bandgap emitters. Inverted-mode current gains of ∼ 100 were obtained, demonstrating the feasibility of this technology for I2L types of digital integrated circuits.

Microwave switching with parallel-resonated GaAs FETS

The use of GaAs FETs as microwave switches is discussed, and the feasibility of such devices for applications requiring ultra low dc power consumption, low insertion loss, and bidirectionality is demonstrated. A discrete SPST switch consisting of two parallel-resonated single-gate GaAs FETs exhibited 0.5 db insertion loss with 25 db isolation at 8.5 GHz. The first monolithic SPDT switch incorporating parallel-resonated GaAs FETs is also reported.

Fabrication and High-Temperature Characteristics of Ion-Implanted GaAs Bipolar Transistors and Ring-Oscillators

GaAs bipolar transistors and ring-oscillators were fabricated by ion implantation into VPE structures. The transistor and circuit performance was tested between 25°C and 400°C. Leakage currents determine the useful temperature range. Present GaAs circuits fail at approximately 390°C due to the metallization technology.

GaAs bipolar integrated circuit technology

Gallium arsenide npn transistors were fabricated successfully by ion implant techniques. The transistors showed normal current gain of 20 ∼ 25 with the substrate used as collector, and inverted current gain of 5 ∼ 6 with the substrate used as emitter. By combining ion implanted resistors and using the transistors operated in the inverted model, it is possible to design and fabricate I2L-like integrated circuits simply.

Performance of digital GaAs E/D MESFET circuits fabricated in GaAs-on-Si substrate

A functional GaAs enhancement/ deplet on (E/D) 1K-bit SRAM and other digital circuits have been fabricated in a GaAs layer grown by MBE on a silicon substrate. These are the most complex digital circuits reported to date for GaAs-on-Si material. The device performance is compared with the bulk GaAs devices fabricated concurrently using identical processes. The average transconductances of enhancement and depletion FETs are found to be approximately 80% of those for bulk GaAs devices. A threshold voltage standard deviation as small as 27 mV across a two inch wafer has been realized. The GaAs-on-Si 1K-bit SRAM has row address access times ranging from 6 to 14 nsec which compares favorably to 4 to 12 nsec for the same SRAMs in bulk GaAs slices.