W. Van Thillo

A 86 MHz–12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS

A 86 MHz-12 GHz digital-intensive reconfigurable PLL frequency synthesizer is presented with 100 kHz to 2 MHz bandwidth. It leverages a 6 fJ/step 5.5 ps, 14b coarse-fine TDC and a 6-12 GHz dual-VCO set. Several simple calibration schemes are proposed that enable the proper performance of the highly efficient TDC in the PLL. The 0.28 mm2 synthesizer, which is appropriate for use in a Software-Defined Radio, features noise cancellation and digital phase modulation and consumes less than 30 mW.

A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication

The link budget of multi-Gb/s wireless communication systems around 60GHz improves by beamforming. CMOS realizations for this type of communication are mostly limited to either one-antenna systems [1], or beamforming ICs that do not implement all radio functions [2]. The sliding-IF architecture of [3] uses RF phase shifting, which deteriorates noise performance.

Low-complexity linear frequency domain equalization for continuous phase modulation

In this paper, we develop a new low-complexity linear frequency domain equalization (FDE) approach for continuous phase modulated (CPM) signals. As a CPM signal is highly correlated, calculating a linear minimum mean square error (MMSE) channel equalizer requires the inversion of a nondiagonal matrix, even in the frequency domain. In order to regain the FDE advantage of reduced computational complexity, we show that this matrix can be approximated by a block-diagonal matrix without performance loss. Moreover, our MMSE equalizer can be simplified to a low-complexity zero-forcing equalizer. The proposed techniques can be applied to any CPM scheme. To support this theory we present a new polyphase matrix model, valid for any block-based CPM system. Simulation results in a 60 GHz environment show that our reduced-complexity MMSE equalizer significantly outperforms the state of the art linear MMSE receiver for large modulation indices, while it performs only slightly worse for small ones.

Joint Transmit and Receive Analog Beamforming in 60 GHz MIMO Multipath Channels

Analog BeamForming (ABF) with one scalar weight per antenna is an attractive technique for low-cost, low-power 60 GHz multi-antenna wireless communication systems. However, the design of the corresponding joint transmit and receive (Tx/Rx) ABF optimization algorithms is still challenging in the case of multipath channels due to the constraint of having only one scalar weight per antenna. In this paper, we aim at maximizing the average Signal to Noise Ratio (SNR) at the input of the equalizer and analytically derive close-to-optimal Tx/Rx scalar weights. We show that the required Channel State Information (CSI) for joint Tx/Rx ABF weights computation is the inner product between all Tx/Rx channel impulse response pairs. Taking the channel length into account, a training-based estimation strategy of this CSI is proposed. Simulation results carried out in a typical 60 GHz multipath environment show that the proposed scheme outperforms the existing ABF schemes in term of BER performances.

A New Symbol Block Construction for CPM with Frequency Domain Equalization

We present a new symbol block construction which yields a cyclic continuous phase modulated (CPM) signal to enable frequency domain equalization. It is known that in addition to a cyclic prefix, a subblock of data-dependent symbols has to be inserted in each block to cope with the memory in the CPM signal. We propose a new subblock, called intrafix, valid for any CPM scheme. Our intrafix is shorter than what is currently known in the literature, reducing the overhead. Moreover, it can be calculated on a per-block basis, without knowledge of previous blocks. We also prove that there are constraints on the length of both the intrafix and the total block by studying the influence of the modulation index. Simulation results in a 60 GHz environment show that our new block construction satisfies all requirements.

Impact of Phase Noise on OFDM and SC-CP

Single-carrier with cyclic prefix (SC-CP) is seen as an interesting air interface to replace orthogonal frequency- division multiplexing (OFDM) because it features a lower peak- to average power ratio (PAPR) while still allowing low complexity frequency domain equalization (FDE). Both air interfaces are highly sensitive to phase noise (PN) that degrades their system performances. In this paper, we study and compare analytically the PN impact on both air interfaces. Simulations are also carried out to validate the analytical results. PN causes the same common phase error (CPE) on both air interfaces, as well as it leads to Inter-Carrier Interference (ICI) in OFDM and inter-symbol interference (ISI) in SC-CP. However OFDM is found to be slightly less affected than SC-CP in both flat channels and frequency selective channels. It is shown also that CPE is the dominate impact if the PN cut-off frequency is smaller than the subcarrier spacing.

A digitally modulated 60GHz polar transmitter in 40nm CMOS

A 60GHz polar Tx prototype implemented in 40nm CMOS includes a two-stage PA with an RF-DAC, an I-Q upconversion mixer, a 60GHz LO hybrid and a digital synchronization interface. Saturated output power is approx. 10dBm, while RF output and baseband input bandwidths are 9GHz and 1.2GHz, respectively. The linear RF-DAC resolution is 5 bits. EVM degradation and spectral mask out-of-band distortion appear at input powers higher than 6dB above P-1dB. EVM is -19dB and -16dB at full rate, and -25.5dB and -22dB at reduced rates for QPSK and 16-QAM signals, respectively. The Tx consumes 75mW from 0.9V, and the core occupies 0.18mm2 of the 2.38mm2 testchip.

Joint TX/RX Analog Linear Transformation for Maximizing the Capacity at 60 GHz

The large bandwidth available at 60 GHz together with the resulting wavelength of only 5 mm allow the design of multi-Gbps wireless devices equipped with large arrays of tiny antennas. This enables wireless communication of large contents multimedia such as high-definition video. However, due to the high cost and power consumption of analog frond-end (AFE) chains at 60 GHz, it is practically infeasible to allocate a dedicated AFE to each antenna. Thus, it is highly desirable to design low complexity multi-antenna architectures in which an analog linear transformation (ALT) is carried out in order to reduce the required number of AFE chains for digital spatial processing, while minimizing the capacity loss. In this paper, we propose a non-iterative algorithm for joint transmit/receive (TX/RX) ALT. The proposed algorithm is designed with the aim of maximizing the capacity of the resulting reduced dimension MIMO system, assuming a frequency selective propagation channel.

Adaptive SSFE Near-ML MIMO Detector with Dynamic Search Range and 80-103Mbps Flexible Implementation

In this paper, we will present a near-ML (maximum likelihood) MIMO (multiple input multiple output) detector explicitly optimized for parallel programmable baseband architectures, such as DSPs (digital signal processors) with VLIW (very long instruction word), SIMD (single instruction multiple data) or vector processing features. First, we propose the SSFE (selective spanning with fast enumeration) algorithm as an architecture friendly near-ML MIMO detector. The SSFE has a distributed and greedy algorithmic structure that brings a completely deterministic and regular dataflow. This enables efficient parallelization on programmable architectures. More importantly, in order to exploit the abundant flexibility enabled by programmable architectures, we propose an efficient online algorithm to adaptively adjust the search range of the SSFE according to the numerical properties of MIMO channel matrixes. Such adaptiveness brings significant throughput improvements at negligible performance degradations. Specifically, on VLIW DSP TI TMS320C6416, such a dynamic adaptation brings 2.62 times to 28.6 times improvements (comparing to the static SSFE) for 1/2 turbo-coded 4 times 4 64 QAM transmissions over 3GPP suburban macro channels, delivering 80 - 103 Mbps average throughput.

Low-Complexity Frequency Domain Equalization Receiver for Continuous Phase Modulation

A new approach for frequency-domain equalization of continuous phase modulated (CPM) signals is presented. In contrast with state-of-the-art receivers, we separate channel equalization on the one hand and CPM demodulation on the other. This separation enables us to calculate independently of the CPM scheme a new low-complexity zero-forcing channel equalizer. We also present a new high-performance minimum mean square error (MMSE) channel equalizer for any CPM scheme and a method to lower its complexity for a popular class of CPM schemes. Simulations show that our new MMSE equalizer significantly outperforms state-of-the-art linear receivers in a 60 GHz multipath environment.