Walter H. Ku

An integrated CMOS distributed amplifier utilizing packaging inductance

An integrated CMOS distributed amplifier is presented. The required inductance needed for the distributed waveguide structure is realized by the parasitic packaging inductance of a plastic surface-mount package. A fully packaged three-stage distributed amplifier fabricated in a 0.8-/spl mu/m CMOS process is presented. The distributed amplifier has a unity gain cutoff frequency of 4.7 GHz, a gain of 5 dB, with a gain flatness of /spl plusmn/1.2 dB over the 300-kHz to 3-GHz band. At a frequency of 2 GHz the amplifier has an input referred third-order intercept point of +15 dBm and an input referred 1-dB compression point of +7 dBm. The amplifier consumes 18 mA from a 3.0-V supply. The distributed amplifier is matched to 50 /spl Omega/ at the input and output and has a maximum input voltage standing-wave ratio (VSWR) of 1.7:1, and a maximum output VSWR of 1.3:1 over the 300 kHz to 3 GHz band. The amplifier has a noise figure of 5.1 dB at 2 GHz.

Device considerations and modeling for the design of an InP-based MODFET millimeter-wave resistive mixer with superior conversion efficiency

We report on the device considerations for resistive FET mixer applications and discuss the design and fabrication of an optimized InP-based 0.1 /spl mu/m gate length planar-doped pseudomorphic In/sub 0.42/Al/sub 0.58/As-In/sub 0.65/Ga/sub 0.35/As modulation-doped FET (MODFET) well-suited for resistive mixer applications. In addition, we present a general large-signal model suitable for describing the FET in its passive mode of operation to assist in the design and simulation of such mixers. Finally, we discuss the theoretical design of a novel W-band, image-reject resistive mixer based on a large-signal model of our optimized device. The predicted performance of the mixer under +8 dBm of LO drive indicates a minimum conversion loss of 9 dB at 94 GHz, a significant improvement of over 3 dB in comparison to similar GaAs-based mixers, suggesting the potential of InP-based resistive mixer technology to achieve superior conversion loss performance. >

A Study of Nonlinearities and Intermodulation Characteristics of 3-Port Distributed Circulators

Results of a study of nonlinearities and intermodulation characteristics of 3-port distributed circulators are presented. Based on a rigorous theoretical analysis of the third-order nonlinearity in ferrites, analytical results are derived for the field strength and the power level of the intermodulation signal. These explicit results are applicable to high-power distributed circulators operating in VHF, UHF, and microwave frequencies. Measured intermodulation characteristics of an experimental distributed VHF high-power circulator are also presented.

Fixed-Point High-Speed Parallel Multipliers in VLSI

The paper presents techniques to increase the speed of fixed-point parallel multipliers and reduce the multiplier chip size for VLSI realizations. It is shown that a higher order (octal) version of the Booth’s Algorithm will lead to significant improvements in speed, coupled with a decrease of chip area and power consumption, as compared to the modified (quaternary) version of the Booth’s Algorithm presently used in or proposed for monolithic multipliers. In addition, further speed improvements can be obtained by using Wallace trees or optimal Dadda types of realizations.

Transfer Function Approximations for a New Class of Bandpass Distributed Network Structures

Characteristic functions for a new class of prototype bandpass transmission-line structures have been derived for both the maximally flat and equiripple or Chebyshev characteristics. The class of bandpass distributed structures considered in this paper consists of commensurate transmission lines with constraints in the form of a shunt open-circuited stub and/or a series short-circuited stub. The gain-bandwidth restrictions imposed by the reactance constraints have been derived and some explicit results are presented for the synthesis of this class of bandpass transmission-line networks. Results presented in this paper are directly applicable to the design of broad-band microwave passive and active networks. In particular, the results are applied to the design of broad-band matching networks for octave-band GaAs FET amplifiers.

Large-signal time-domain simulation of HEMT mixers

A large-signal HEMT (high electron mobility transistor) model and a time-domain nonlinear circuit analysis program have been developed. A systematic method to simulate HEMT mixers and design them for maximum conversion gain is presented. The transconductance-compression effect reduced the mixers conversion gain at high frequencies. Simulation results from mixers designed to operate at 10, 20, and 40 GHz show that a reduction in parasitic conduction in the AlGaAs layer significantly increases the conversion gain. >

Gain-Bandwidth Limitations and Synthesis of Single-Stub Bandpass Transmission-Line Structures

Gain-bandwidth limitations and synthesis of a class of bandpass transmission-line structures with a single shunted stub and n cascaded commensurate lines are presented in this paper. With a shunt shorted stub as the reactive constraint, the optimum gain bandwidth is derived for an ideal bandpass gain characteristic. Explicit gain-bandwidth and synthesis results have been obtained for the class of single-stub cascaded line structures with one and two cascaded lines for both maximally flat and Chebyshev characteristics. For the general case of n cascaded lines approximate gain-bandwidth limitations have also been derived. The explicit results including gain-bandwidth limitations and element values can be used for the design of this class of bandpass transmission-line networks for broad-band matching of the reactive constraint as well as impedance transformation.

VLSI Implementation Of The Fast Fourier Transform

A VLSI implementation of a Fast Fourier Transform (FFT) processor consisting of a mesh interconnection of complex floating-point butterfly units is presented. The Cooley-Tukey radix-2 Decimation-In-Frequency (DIF) formulation of the FFT was chosen since it offered the best overall compromise between the need for fast and efficient algorithmic computation and the need for a structure amenable to VLSI layout. Thus the VLSI implementation is modular, regular, expandable to various problem sizes and has a simple systolic flow of data and control. To evaluate the FFT architecture, VLSI area-time complexity concepts are used, but are now adapted to a complex floating-point number system rather than the usual integer ring representation. We show by our construction that the Thompson area-time optimum bound for the VLSI computation of an N-point FFT, area-time2oc = ORNlogN)1+a] can be attained by an alternative number representation, and hence the theoretical bound is a tight bound regardless of number system representation.

Design Techniques and Intermodulation Analysis of Broad-Band Solid-State Power Amplifiers

This paper presents balanced circuit techniques for the reduction and cancellation of the dominating third-order intermodulation tion product generated by broad-band solid-state power amplifiers. These techniques are applicable to collocated transmitters where the interference enters through the output port of the transmitter. A rigorous derivation is presented to prove the validity of the intermodulation canceliation by using a quadrature-hybrid coupling scheme in a balanced circuit configuration. The results are valid for arbitrary nonlinear characteristics exhibited by general classes of amplifiers, as well as isolators.

Broadband Microwave Field-Effect Transistor Amplifiers

With the recent advent of transistors which are capable of operating in the microwave frequencies, both bipolar and field-effect transistors are used to replace other microwave amplifiers. In this paper, the broadband design theory and some experimental results of microwave field-effect transistor (FET) amplifiers are presented. The basic elements used in these broadband amplifiers are microwave silicon and gallium-arsenide Schottky-barrier field-effect transistors. Analytical broadband matching techniques are used together with computer-aided optimization techniques in the design of these broadband microwave FET amplifiers.