Wang Jiaxin

SHORT-GATE TUNNELLING FIELD-EFFECT TRANSISTOR OF VERTICAL NON-UNIFORM DOPED CHANNEL AND PREPARATION METHOD THEREFOR

Three-face-source tunneling field effect transistor and manufacturing method thereof

Double-graphene-layer tunneling field effect transistor and manufacturing method thereof

Embedding layer heterojunction tunneling field effect transistor and manufacturing method thereof

Junction-modulated type tunneling field effect transistor and manufacturing method thereof

Deep-energy-level impurity tunneling field-effect transistor (TFET) and preparation method thereof

Tunneling field-effect transistor with composite-mechanism strip-type grid and preparation method of tunneling field-effect transistor

Method for preparing tunneling field effect transistor

STRIP-SHAPED GATE TUNNELING FIELD EFFECT TRANSISTOR USING COMPOSITE MECHANISM AND FABRICATION METHOD THEREOF

信頼性と性能同時最適化を考慮したトンネルFETにおける絶縁破壊への深い洞察【Powered by NICT】