Wen-Chieh Shih

Nonpolar resistive switching in the Pt/MgO/Pt nonvolatile memory device

Nonpolar resistive switching (RS), which is the coexistence of unipolar and bipolar RS characteristics, in the Pt/MgO/Pt memory device with the nonforming nature is demonstrated. The nonforming nature is ascribed to the relatively high defect density of the MgO film deposited by using the ion beam sputtering in Ar atmosphere. The results of Auger electron spectroscopy and x-ray photoelectron spectroscopy analyses combing with the temperature dependence of resistance suggest that metallic Mg filaments are formed in the low resistance state. The voltage-polarity-independent RESET process implies that filaments may be ruptured by local Joule heating, leading to nonpolar characteristics.

Fabrication and characterization of metal-ferroelectric (PbZr0.53Ti0.47O3)-Insulator (Y2O3)-semiconductor field effect transistors for nonvolatile memory applications

Metal-ferroelectric-insulator-semiconductor (MFIS) field effect transistors with Pb(Zr0.53,Ti0.47)O3 (PZT) ferroelectric layer and yttrium oxide Y2O3 insulator layer were fabricated. The maximum C-V memory window of 1.5V was obtained at a sweep voltage of 8V. The dominating conduction mechanism through the MFIS structure is Schottky emission in the temperature range from 300to450K. The nonvolatile operation of MFIS transistors was demonstrated by applying positive/negative writing pulses. The retention shows that the transistors maintain a threshold voltage window of 1.2V without deterioration after 3×103s. The low leakage current and the high effective Y2O3∕Si barrier height of 1.85eV can well explain the size of memory window and retention properties. The effect of charge injection is reduced in this structure.

Fabrication and characterization of metal-ferroelectric (PbZr0.6Ti0.4O3)-insulator (La2O3)-semiconductor capacitors for nonvolatile memory applications

Metal-ferroelectric-insulator-semiconductor thin-film capacitors with Pb(Zr0.6,Ti0.4)O3 (PZT) ferroelectric layer and high-k lanthanum oxide (La2O3) insulator layer were fabricated. The outdiffusion of atoms between La2O3 and silicon was examined by the secondary-ion-mass spectroscopy. The size of memory window as a function of PZT annealing temperature was discussed. The maximum memory window saturated to 0.7 V, which is close to the theoretical memory window ΔW≈2dfEc≈0.8 V with higher annealing temperatures above 700 °C. The memory window starts to decrease due to charge injection when the sweep voltage is higher than 5 V at 600 °C-annealed samples. The C-V flatband voltage shift (ΔVFB) as a function of charge injection was characterized in this work. An energy band diagram of the Al/PZT//La2O3/p-Si system was proposed to explain the memory window and the flatband voltage shift.

Metal-ferroelectric (BiFeO3)-insulator (Y2O3)-semiconductor capacitors and field effect transistors for nonvolatile memory applications

Metal-ferroelectric-insulator-semiconductor capacitors and field effect transistors with Al/BiFeO3/Y2O3/Si structure were fabricated and characterized for nonvolatile memory applications. The capacitance-voltage curves exhibit a maximum clockwise memory window of 0.92 V. The minimum leakage current density is 2×10−7 A/cm2 at an applied voltage of 5 V. The capacitance-voltage memory window as a function of the sweep voltage range was investigated. The IDS-VGS curves of metal-ferroelectric-insulator-semiconductor transistors show a maximum memory window of 0.84 V. The drain current on/off ratio maintained more than three orders of magnitude after an elapsed time of 104 s.

The effect of band offset on the retention properties of metal-ferroelectric (PbZr0.53Ti0.47O3 ) -insulator (Dy2O3, Y2O3)-semiconductor capacitors and field effect transistors

Metal-ferroelectric-insulator-semiconductor field effect transistors (MFISFETs) and capacitors with the structures of Al∕Pb (Zr0.53,Ti0.47) O3 (PZT)∕Dy2O3∕Si and Al∕PZT∕Y2O3∕Si were fabricated. The variation of the memory window as a function of annealing temperature was studied. The maximum capacitor-voltage (C-V) memory window of Al∕PZT∕Dy2O3∕Si capacitors was 2.95V. The retention times of Al∕PZT∕Y2O3∕Si and Al∕PZT∕Dy2O3∕Si MFISFETs were 11.5days and 11.1h, respectively. The longer retention time of Al∕PZT∕Y2O3∕Si MFISFETs is attributed to the larger conduction band offset at the Y2O3∕Si interface (2.3eV) compared to that of Dy2O3∕Si (0.79eV).

THE EFFECT OF REDUCED GATE LEAKAGE ON IMPROVED RETENTION TIME OF METAL-FERROELECTRIC (PbZr0.53Ti0.47O3)-INSULATOR (ZrO2)-SEMICONDUCTOR CAPACITORS

ABSTRACT Al/ Pb (Zr0.53, Ti0.47) O3 (PZT) /ZrO2/Si metal-ferroelectric-insulator semiconductor (MFIS) capacitors were fabricated. The wafers were given a H2O2 pre-treatment before ZrO2 deposition and a HCl treatment after deposition. The interface states were reduced from 5.62 × 1013/cm2 to 4.0 × 1012/cm2 and the composite dielectric constant of ZrO2 film plus interfacial layer was increased from 5.54 to 7.3. The leakage current density was 5.4 × 10−6 A/cm2 at a sweep voltage of 5 V. The retention time of Al/PZT/ZrO2/Si capacitors after these surface treatments was increased from 13.3 hours to 17.1 days. The improved retention time is attributed to the reduced gate leakage current.

The improvement of retention time of metal-ferroelectric (PbZr0.53Ti0.47O3)-insulator (Y2O3)-semiconductor transistors by surface treatments

Metal-ferroelectric-insulator-silicon transistors [Fe-field-effect transistors (FeFETs)] with Al∕Pb (Zr0.53,Ti0.47) O3∕Y2O3∕Si structure were fabricated. The wafers were pretreated with H2O2 before Y2O3 deposition and post-treated with HCl after Y2O3 deposition. With both treatments, the drain current ratio after writing pulses of ±8V with a duration of 100ns was measured as 105. The leakage current was reduced from 10−3to10−6A∕cm2. The FeFETs maintain a threshold voltage window of about 1.5V after an elapsed time of 5000s. The improvements are due to the reduction of the leakage current and the charge injection effect at the Y2O3∕Si interface.

The improvement of retention time of metal-ferroelectric (PbZr0.53Ti0.47O3)-insulator (ZrO2)-semiconductor transistors and capacitors by leakage current reduction using surface treatment

Metal-ferroelectric-insulator-semiconductor transistors (MFISFETs) and capacitors with the structure of Al∕Pb (Zr0.53,Ti0.47) O3∕ZrO2∕Si were fabricated. The wafers were pretreated with H2O2 before ZrO2 deposition and/or post-treated with HCl after ZrO2 deposition. The leakage current density at 5V is reduced from 10−1to5×10−6A∕cm2. The subthreshold slope was improved to 91mV/decade. The MFISFETs maintain a threshold voltage window of about 1.1V after an elapsed time of 3000s. The mobility is 267cm2∕Vs. The improvements are most likely due to the reduction of interfacial layer thickness and the interface states at the ZrO2∕Si interface.

Electrical characteristics of metal-ferroelectric (BiFeO3)-insulator (Y2O3)-semiconductor capacitors and field-effect transistors

Metal-ferroelectric-insulator-semiconductor (MFIS) capacitors and field effect transistors (FETs) with Al∕BiFeO3∕Y2O3∕Si structure were fabricated. The capacitance-voltage (C-V) characteristics exhibit clockwise hysteresis loop due to the ferroelectric polarization of BiFeO3. The maximum C-V memory window was 0.88V at a sweep voltage range of 5V. Low leakage current density of 7×10−9A∕cm2 was measured at an applied voltage of 5V using MFIS capacitors. The IDS-VDS and IDS-VGS characteristics of MFISFETs were measured. The subthreshold slope was 170mV∕dec and the maximum electron mobility was 155cm2∕Vs.

Electrical properties of metal-ferroelectric (PbZr0.53Ti0.47O3)-polysilicon-insulator (Y2O3)-silicon capacitors and field-effect transistorsa)

In this work, Al∕PbZr0.53Ti0.47O3(PZT)∕n+-polysilicon/Y2O3∕Si (MFPIS) capacitors and transistors were fabricated. A n+-polysilicon floating gate was used to reduce the depolarization field of the ferroelectric layer. The gate leakage current density was as low as 1.68×10−10A∕cm2 at 5V. The IDS-VGS memory window shows a maximum of 2.5V at a sweeping VGS voltage range of 9V. The subthreshold slope is 169mV∕decade. The IDS-VGS on and off ratio of MFPIS field effect transistor was about 104. The MFPIS field effect transistors maintained a threshold voltage window of about 1.6V after an elapsed time of 104s.