Wen-Chuan Wang

Improvement of etching selectivity for 32-nm node mask making

As the geometry of semiconductor devices continue to scale down, high-NA imaging will be used to enhance the resolution. Sub-resolution assistant features are used to gain depth of focus at the wafer. One of the challenges in patterning small assistant features during mask fabricating is resist collapse. Reducing resist thickness is one of the solutions. This necessitates an increase in the selectivity of chromium (Cr) to photo-resist (PR). The selectivity determines the PR remaining on the mask after Cr etching. Insufficient remaining PR will induce pinhole-type clear defect and poor line edge roughness (LER). In this paper, the Cr-to-PR selectivity was studied under induced couple plasma (ICP) and quasi-remote plasma environment. PR remaining, etching bias, and critical dimension uniformity (CDU) are the main subjects for evaluation. To understand the etching behavior for higher selectivity, design of experiment (DOE) L4 by Taguchi method is used to find the dominating factors. By adopting the optimized etching recipe, the resist can be thinned down to effectively improve its collapse margin, especially for smaller assistant features. The results show that 72-nm assistant features on mask can be patterned for early 32-nm node development. This paper also suggests several approaches that can be used to reduce the required resist thickness, such as hard-mask, film thickness reduction, and etcher hardware modification.

Study of loading effect on dry etching process

Nowadays, the CD (Critical Dimension) control on masks manufacturing plays an important role in photolithography process for 90-nm node technology and below. The process performance of photolithography will degrade severely even when the mask CD error is small. One of the most important process-induced mask CD errors comes from the dry etching process. With the loading effect due to environment pattern variations, isolated and dense patterns have different etching biases. Furthermore, the loading effect can induce an overall CD variation called global loading effect contributed from the pattern density change in large areas and a CD variation on individual monitor pattern called micro-loading effect contributed from various feature dimensions in the near region. The micro-loading effect can also be classified as the “nearest spacing” effect which is dependent upon the space between the nearest neighbor pattern and the monitor pattern, and the “nearest neighbor” effect which is dependent upon the size of the nearest neighbor feature around the monitor pattern. All of these effects enlarge the total range of mask CD linearity and proximity errors. In this paper we report the result of the global loading effect and micro-loading effect by varying pattern densities and feature dimensions nearby. With the design of test pattern, the global loading effect and the micro-loading effect can be separated. The CD variation dominated by the micro-loading effect in the dry etching process is observed. This large etching bias change resulted from the micro-loading effect is consistent with the depletion of radical species in the narrow space during the etching process.

Global CD uniformity improvement in mask manufacturing for advanced lithography

The control of global critical dimension uniformity (GCDU) across the entire mask becomes an important factor for the high-end masks quality. Three major proceses induce GCDU error before after-developing inspection (ADI) including the E-Beam writing, baking, and developing processes. Due to the charging effect, the fogging effect, the vacuum effect and other not-well-known effects, the E-Beam writing process suffers from some consistent GCDU errors. Specifically, the chemical amplified resist (CAR) induces the GCDU error from improper baking. This phenomenon becomes worse with negative CARs. The developing process is also a source of the GCDU error usually appears radially. This paper reports the results of the study of the impact of the global CD uniformity on mask to wafer images. It also proposes solutions to achieve better masks.

Mask pattern fidelity quantification

In this paper, a quantitative evaluation of mask quality in the domain of 2D pattern fidelity and a method of assessing the OPC model effectiveness are investigated. The spirit of our algorithm is to characterize the wafer lithographic performances of both the real physical mask and the ideal OPCed layout mask that the physical mask is based on. To acquire these performances, we adopted a CD-SEM image process technique for transforming an actual SEM mask image into a simulation-friendly format like GDSII together with the methods to correctly handle the image transformation and interpret the simulation results. Finally, the images, such as the simulated aerial images, the simulated or observed resist top views, are superposed for comparison using logic operation.