Wenhe Lin
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Publication
Featured researches published by Wenhe Lin.
Japanese Journal of Applied Physics | 2002
Chew-Hoe Ang; Chun-Meng Lek; Shyue-Seng Tan; Byung Jin Cho; Tupei Chen; Wenhe Lin; Jia-Zheng Zhen
The behavior of negative-bias-temperature-instability (NBTI) on ultra-thin plasma-nitrided silicon dioxide films (1.8 and 2.6 nm) has been investigated and compared with conventional thermal nitridation. Plasma-nitrided oxides shows more resistance to NBTI, as compared to thermal-nitrided oxides. This is attributed to the fact that plasma nitridation incorporates the nitrogen at the top oxide surface, thus mitigating the undesirable nitrogen-enhanced NBTI effect. Additionally, the degradation mechanism of NBTI is found to be insensitive to the nitridation process, nitrogen concentration and boron penetration.
Electrochemical and Solid State Letters | 2002
Chew-Hoe Ang; Shyue-Seng Tan; Chun-Meng Lek; Wenhe Lin; Zj Zheng; T. P. Chen; Byung Jin Cho
The impact of nitrogen plasma nitridation on the interfacial quality of ultrathin oxides (1.8 and 2.6 nm) have been investigated and compared with NO nitridation. It is found that plasma-nitrided oxides are more immune tonitridation-induced degradation of channel hole mobility, and have lower intrinsic interlace-trap density as compared to NO-nitrided oxides. In addition, plasma-nitrided oxides can further suppress hole mobility degradation induced by boron penetration. The superior performance of nitrogen plasma nitridation is attributed to its capability of incorporating a high level of nitrogen at the top oxide surface, while keeping the Si-SiO 2 interface intact.
Solid-state Electronics | 2002
Chew-Hoe Ang; Lian-Hoon Ko; Wenhe Lin; J. Z. Zheng
Abstract The impact of rapid-thermal spike anneal after source/drain extension (SDE) implant on the integrity of ultra-thin gate oxide is studied. It is found that SDE anneal can cause increasingly severe gate oxide integrity (GOI) degradation as the gate oxide becomes thinner. The GOI degradation can be suppressed by growing a thin oxide on the polysilicon gate or inserting an offset spacer prior to the SDE implant step. Additionally, a close correspondence between GOI degradation, gate to source/drain leakage current, and the bridging of dense polysilicon lines is observed, indicating a common origin for these phenomena.
Archive | 2002
Chew Hoe Ang; Wenhe Lin; Jia Zhen Zheng
Archive | 2002
Chew Hoe Ang; Eng Hua Lim; Wenhe Lin; Jia Zhen Zheng
Archive | 2002
Chew-Hoe Ang; Jeffrey Chee Wei-Lun; Wenhe Lin; Jia Zhen Zheng
Archive | 2003
Chew Hoe Ang; Wenhe Lin; Jia Zhen Zheng
Archive | 2001
Chew-Hoe Ang; Wenhe Lin; Jia Zhen Zheng
Archive | 2002
Chew Hoe Ang; Alan Lek; Wenhe Lin
international symposium on the physical and failure analysis of integrated circuits | 2002
Chun-Meng Lek; Byung Jin Cho; Wei Yip Loh; Chew-Hoe Ang; Wenhe Lin; Yun-Ling Tan; Jia-Zheng Zhen; Lap Chan; Shyue Seng Tan; T. P. Chen