William French

Thermoreflectance CCD Imaging of Self-Heating in Power MOSFET Arrays

Thermoreflectance imaging with high spatial resolution is used to inspect self-heating distribution in active high power (4A) metal-oxide-semiconductor field-effect transistor transistor arrays designed for high-frequency (MHz) operation. Peak temperature change and self-heating distribution is analyzed for both low- and high-dc bias cases and for different ambient die temperatures (296-373 K). Thermoreflectance images reveal temperature nonuniformity greater than a factor of two over the full area of the transistor arrays. Thermal nonuniformity is revealed to be strongly dependent on both bias level and ambient die temperature. Verification based on the fine grain power dissipation in the transistor array was performed using the R3D method for electrical simulation and power blurring for thermal simulation. Results demonstrate thermoreflectance imaging as an effective tool for fast submicrometer noncontact thermal characterization of active power devices.

Nonlinear Frequency-Dependent Model for Microinductors With Magnetic Core

This letter presents a compact nonlinear and frequency-dependent equivalent circuit model for microinductors with thin-film magnetic cores. The model is suitable for many existing microinductor geometries. It captures magnetic saturation and eddy currents and electric field coupling in a physically meaningful manner and can be directly implemented in commonly used circuit simulators. The new model lends itself for simple extraction from standard biased small-signal impedance analyzer measurements. We demonstrate the performance of the proposed model for a representative measured NiFe inductor. The results of the extracted model are in good agreement with the measurements.

Modeling Microinductors With Thin-Film Alloy Magnetic Cores

This paper presents a compact nonlinear frequency-dependent circuit model for microinductors with magnetic thin-film cores. The model captures saturation, high-frequency eddy currents in the conductors and core, and capacitive effects. A modeling extraction algorithm is proposed that generates a passive and accurate circuit from current-biased small-signal impedance measurements. These measurements are wafer-level compatible and can readily be made using an impedance analyzer or vector network analyzer. The model is applicable to the most common microinductor topologies, including toroidal, stripline, and racetrack used for integrated power electronics applications. We demonstrate the model performance of these three different microinductor geometries with commercially available field solvers as well as actual device measurements for switched mode power supply applications. Field-solver simulations show that the model captures ac power loss significantly better than traditional models and captures the current waveforms within 4.5% error. Comparison of the model to device measurements results in an RMS error less than 7.1% in current waveform for a device transitioning in and out of saturation due to a 10-MHz rectangular pulse.