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Featured researches published by William J. Lambert.


applied power electronics conference | 2014

FIVR — Fully integrated voltage regulators on 4th generation Intel® Core™ SoCs

Edward A. Burton; Gerhard Schrom; Fabrice Paillet; Jonathan P. Douglas; William J. Lambert; Kaladhar Radhakrishnan; Michael J. Hill

Intels® 4th generation Core™ microprocessors are powered by Fully Integrated Voltage Regulators (FIVR). These 140 MHz multi-phase buck regulators are integrated into the 22nm processor die, and feature up to 80 MHz unity gain bandwidth, non-magnetic package trace inductors and on-die MIM capacitors. FIVRs are highly configurable, allowing them to power a wide range of products from 3W fanless tablets to 300W servers. FIVR helps enable 50% or more battery life improvements for mobile products and more than doubles the peak power available for burst workloads.


IEEE Transactions on Components, Packaging and Manufacturing Technology | 2016

Package Inductors for Intel Fully Integrated Voltage Regulators

William J. Lambert; Michael J. Hill; Kaladhar Radhakrishnan; Leigh Wojewoda; Anne E. Augustine

Intel fourth-generation and fifth-generation Core microprocessors are powered by high-frequency integrated switching voltage regulators. The inductors required to implement these regulators are constructed using the routing layers of conventional organic flip chip packaging. This paper provides an overview of the construction of these inductors including representative results from production packages. Measured inductors reported in this paper span from 1 to 6.7 nH under 2.4 mm2 and achieve Q of up to 24 at 140 MHz (the switching frequency).


electronic components and technology conference | 2014

Package embedded inductors for integrated voltage regulators

William J. Lambert; Michael J. Hill; Kaladhar Radhakrishnan; Leigh Wojewoda; Anne E. Augustine

Intel® 4th generation Core™ microprocessors are powered by high frequency integrated switching voltage regulators. The inductors required to implement these regulators were constructed using the routing layers of conventional organic flip chip packaging. This paper provides an overview of the simulation and measurement of these embedded inductors including representative results from production packages.


Archive | 2008

TRANSIENT VOLTAGE COMPENSATION SYSTEM AND METHOD

Rajapandian Ayyanar; William J. Lambert; Shamala A. Chickamenahalli


Archive | 2017

TSV-CONNECTED BACKSIDE DECOUPLING

William J. Lambert; Robert L. Sankman; Tyler N. Osborn; Charles Gealer


Archive | 2015

DIE ASSEMBLY ON THIN DIELECTRIC SHEET

Chia-Pin Chiu; Qing Ma; Robert L. Sankman; Paul B. Fischer; Patrick Morrow; William J. Lambert; Charles Gealer; Tyler N. Osborn


Archive | 2017

SYSTEMS AND METHODS FOR CONTROLLED EFFECTIVE SERIES RESISTANCE COMPONENT

William J. Lambert; Mathew J. Manusharow


Archive | 2017

PACKAGE INTEGRATED POWER INDUCTORS USING LITHOGRAPHICALLY DEFINED VIAS

Mathew J. Manusharow; William J. Lambert; Krishna Bharath; Adel Elsherbini; Feras Eid; Aleksandar Aleksov; Henning Braunisch


Archive | 2017

MAGNETIC MATERIAL COATED WIRE INDUCTOR

William J. Lambert; Kevin O'brien; Omkar G. Karhade


Archive | 2017

APPARATUS AND METHOD TO REDUCE POWER LOSSES IN AN INTEGRATED VOLTAGE REGULATOR

Krishna Bharath; Srikrishnan Venkataraman; William J. Lambert; Michael J. Hill; Alexander Slepoy; Dong Zhong; Kaladhar Radhakrishnan; Hector A. Aguirre Diaz; Jonathan P. Douglas

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