Woosup Shin

Origin of the improved mobility and photo-bias stability in a double-channel metal oxide transistor.

This study examined the performance and photo-bias stability of double-channel ZnSnO/InZnO (ZTO/IZO) thin-film transistors. The field-effect mobility (μFE) and photo-bias stability of the double-channel device were improved by increasing the thickness of the front IZO film (t(int)) compared to the single-ZTO-channel device. A high-mobility (approximately 32.3 cm(2)/Vs) ZTO/IZO transistor with excellent photo-bias stability was obtained from Sn doping of the front IZO layer. First-principles calculations revealed an increase in the formation energy of O vacancy defects in the Sn-doped IZO layer compared to the IZO layer. This observation suggests that the superior photo-bias stability of the double-channel device is due to the effect of Sn doping during thermal annealing. However, these improvements were observed only when t(int) was less than the critical thickness. The rationale for this observation is also discussed based on the oxygen vacancy defect model.

A Novel Four-Mask Low-Temperature Polycrystalline Silicon PMOS Thin-Film Transistor With Advanced Terrace Structure for AMOLED Application

We propose a novel four-mask low-temperature polycrystalline-silicon PMOS structure. In this letter, we obtain the utmost simplified thin-film transistor (TFT) structure by eliminating the storage doping, passivation, and anode photomask steps. The proposed four-mask structure has a self-aligned terrace structure whose lightly doped drain (LDD) and gate-overlapped LDD are formed with only one photomask step. The on current of the four-mask PMOS TFT with an advanced terrace structure is similar to that of the conventional seven-mask TFT, while the off current of the new structure is lower than that of the conventional seven-mask TFT.

Improvement in the Photo-Bias Stability of Zinc Tin Oxide Thin-Film Transistors by Introducing a Thermal Oxidized

This paper examined the morphological, structural, and electrical properties of thermal titanium oxide (TiO_x) films as a function of the physical thickness. All the thermal TiO_x films were assigned to a TiO₂ chemical state irrespective of the film thickness. The thinner TiO₂ films (≤ 5 nm) showed an amorphous phase, whereas the thicker TiO₂ film (≥ 7 nm) had a nanocrystalline structure. This intriguing thickness-dependent crystallization behavior can be explained by the dimensional effect. The mobility of the resulting zinc tin oxide (ZTO) thin-film transistors (TFTs) with a gate-stack of silicon nitride (SiN_x) and TiO₂/SiN_x was monotonously reduced with increasing TiO₂ film thickness, which can be attributed to the enhanced Columbic scattering effect of TiO₂ films. On the other hand, the negative bias illumination stress instability of the ZTO TFTs can be suppressed significantly to -2.4 V by the adoption of a 5-nm-thick TiO₂ film compared with that (-14.4 V) of the ZTO device without a TiO₂ film, which is discussed based on the valence band-off structure and the amorphous nature of thermal TiO₂ films.

{\rm TiO}_{2}

We have demonstrated the feasibility of thin-film coatable type polarizer for high contrast. New liquid crystalline materials were developed and the manufacturing process was optimized to achieve high performance polarization characteristics. We made a 9.7 inch XGA prototype with our newly developed polarizer, and obtained good image quality and high electro-optical performance. More approaches to get higher polarization performance in terms of materials and manufacturing process were discussed.

Film as a Hole Carrier Blocking Layer

In the conventional sequential lateral solidification (SLS) method for polycrystalline silicon thin-film transistors (poly-Si TFTs), as a starting process in general, one just performs a basic pre-alignment of the substrate on the stage and applies laser irradiation for a whole substrate area scan. Therefore, each thin-film transistor (TFT) has different grain boundary (GB) locations in a corresponding channel region. The number of GBs in the channel also varies from one to two, which can give rise to electrically non-uniform TFT characteristics and an image quality deterioration of the panel. We developed a new alignment SLS method for controlling the GB location in the TFT channel region, allowing us to locate the GB at the same position in the channel region of each TFT. We fabricated TFT by applying the new alignment SLS process and compared the TFT electrical characteristics between a normal SLS method and the new one. We also analyzed degradation phenomena under hot carrier stress conditions for lightly doped drain n-type metal oxide semiconducting field effect transistors.

38.6L: Late‐News Paper: Advanced Coatable Polarizer Technology by Using Novel Liquid Crystalline Materials and Organic Dyes

We propose two types of six-step photomask, complementary metal–oxide–semiconductor (CMOS), thin-film transistor (TFT) PCT device structures in order to simplify their fabrication process compared with that of conventional, low-temperature, polycrystalline silicon (LTPS) CMOS TFT devices. The initial charge transfer characteristics of both types of six-step PCT are equivalent to those of the conventional nine-step PCT. Both types of six-step PCT are comparable to the conventional nine-step mask lightly doped drain (LDD) device in terms of the dc device lifetime of over 10 years at Vds=5 V for line inversion driving, which is the normally recognized duration time for semiconducting devices.