Wouter Volkaerts
Katholieke Universiteit Leuven
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Publication
Featured researches published by Wouter Volkaerts.
international solid-state circuits conference | 2015
Wouter Volkaerts; Niels Van Thienen; Patrick Reynaert
Technology scaling has enabled RF-CMOS circuits that operate in the millimeter-wave frequency range (30 to 300GHz) where large bandwidths are available. These bandwidths can be exploited to increase data-rates of wireless communication links. Unfortunately, free-space path loss (FSPL) limits the operating distance of wireless systems at these frequencies. A 5-meter link at 120GHz has an FSPL as high as 88dB. Therefore such wireless links are feasible only with highly directive antennas. This work uses a directive channel instead. At mm-Wave frequencies, the directive channel can be a low-cost plastic fiber or hollow tube, made from PP, PS or Teflon. These directive channels will guide electromagnetic waves with low loss from TX to RX [1-4]. As such, RF communication through a plastic fiber becomes an interesting alternative and complements existing solutions like wireline copper or optical fibers. This paper presents an entire communication link that uses a continuous-phase frequency-shift keying (CPFSK) TX and RX. We report on 120GHz 40nm CMOS TX and RX chips, the connector solution, and the plastic channel. Data-rates up to 12.7Gb/s over 1m, transmission lengths up to 7m at 2.5Gb/s and an energy efficiency of 1.8pJ/b/m for 4m and 7.4Gb/s are achieved for the complete communication link. All these results are for a BER 10-12. Compared to previous work, measurements also show the link still works for a bending radius of only 25mm, thanks to the selection of a high carrier frequency.
radio frequency integrated circuits symposium | 2011
Wouter Volkaerts; Michiel Steyaert; Patrick Reynaert
This paper presents a 118GHz fundamental voltage controlled oscillator in a 65nm low power CMOS technology. Using accumulation mode varactors, the oscillator covers a frequency range from 113.4GHz to 122.6GHz, which corresponds to a 7.8% tuning range. This is the widest tuning range in a D-band VCO reported to date. Combined with a variable supply voltage, the tuning range is extended to 11GHz (9.3%). The VCO draws 5.6mA from a 1V supply and the output is higher than −28.5 dBm. The measured phase noise at 118.3GHz is −83.9dBc/Hz at 1MHz offset. The FOMT is −175.7dB, which is the highest reported for a D-band VCO.
radio frequency integrated circuits symposium | 2013
Wouter Volkaerts; Michiel Steyaert; Patrick Reynaert
Summary form only given. This paper presents a new architecture for a 120GHz quadrature frequency generator with large tuning range and immunity against PA-VCO coupling. Combining the output signals of two independent oscillators, the pulling effect is removed and the oscillator can be integrated with a PA and an antenna on the same chip. This architecture also makes quadrature generation with large tuning range feasible at 120GHz. The chip is fabricated in a 45nm CMOS technology and shows a tuning range of 16.2GHz (13.5%), a phase noise of -112dBc/Hz @ 10MHz offset and a phase error of 5°.
international symposium on circuits and systems | 2010
Wouter Volkaerts; Bart Marien; Hans Danneels; Valentijn De Smedt; Patrick Reynaert; Wim Dehaene; Georges Gielen
RF-powered wireless sensor networks demand for ultra-low-energy A/D converters. Such systems have specific requirements, like fast start-up time and supply voltage independence. The presented A/D converter is based on a digital phase locked loop. Two closely matched ring oscillators perform the analog to frequency conversion. The digital output is generated by an in-loop digital proportional-integral filter. The acquisition of the PLL is splitted into coarse and fine tuning to reduce the locking time to less than 30µs. A UMC130 CMOS technology is used to simulate a temperature sensor interface. The energy consumption is maximally 212 pJ per conversion and the effective number of bits is 7 bit in a 0.5 V-1.4 V supply voltage range.
european solid state circuits conference | 2016
Patrick Reynaert; Maarten Tytgat; Wouter Volkaerts; Alexander Standaert; Yang Zhang; Maxime De Wit; Niels Van Thienen
This paper discusses some of the recent advances and challenges that lie ahead for Polymer Microwave Fibers (PMF). PMF is a communication concept that combines mm-wave chips, metal couplers and cheap plastic fibers. It has some unique benefits over copper wireline and optical which can give it a preferred solution for low-cost, low-weight robust high-speed data-communication such as automotive and industrial Ethernet, consumer-oriented connectivity, signal distribution and more.
IEEE Journal of Solid-state Circuits | 2016
Niels Van Thienen; Wouter Volkaerts; Patrick Reynaert
This paper presents a multi-gigabit communication link over a polymer microwave fiber (PMF). A polymer fiber is a light-weight and low-loss channel at millimeter-wave (mm-Wave) frequencies. PMF is a promising, robust and low-cost technology to complement copper or optical links for high-speed applications with transmission distances up to several meters. The high carrier frequency of 120 GHz ensures low bending losses for small bending radii and features a large absolute bandwidth, which can be exploited to achieve high data rates with a simple modulation scheme. The used continuous-phase frequency shift keying (CPFSK) modulation results in a power-efficient system at both the TX and the RX side. We report on 120 GHz 40 nm bulk CMOS TX and RX chips, the fiber and the coupling solution between the chips and the fiber. Data rates up to 12.7 Gbps over 1 meter, transmission lengths up to 7 meters at 2.5 Gbps and a link energy efficiency of 1.8 pJ/b/m for 4 meters and 7.4 Gbps are achieved for the complete communication link.
european solid-state circuits conference | 2013
Noël Deferm; Wouter Volkaerts; Juan F. Osorio; Anton de Graauw; Michiel Steyaert; Patrick Reynaert
In this paper a fully integrated D-band transmitter with on-chip dipole bondwire antenna implemented in 45nm low power CMOS is presented. On-chip frequency generation, insensitive to VCO pulling, is integrated together with a direct carrier quadrature vector modulator, ASK modulator, 4-stage differential transformer-coupled power amplifier and antenna. Digital baseband circuits are also integrated on the same chip. The chip is capable of generating QPSK and Star-QAM modulation formats. Data transmission over a distance up to 1m is achieved for data rates as high as 2Gb/s. For shorter distances, data rates up to 10Gb/s are measured.
international conference on electronics, circuits, and systems | 2012
Paramartha Indirayanti; Wouter Volkaerts; Patrick Reynaert; Wim Dehaene
In this paper, a pulse generator circuit for mm-wave imaging systems is presented. The pulse generation system consists of a pulse generator core circuit and a nonlinear transmission line (NLTL) as pulse compressor. The width compression is the key feature of this design as a pulse narrowing in time domain corresponds to bandwidth expansion in frequency domain. A digitally generated pulse is decomposed by the NLTL into several impulse waves called solitons. Finally, the secondary solitons are degenerated by means of tapering. In this way, the compression effect is achieved. The simulation results showed that the narrowest pulse generated by the delay line-based pulse generator circuit was 37ps. Following that, the NLTL further compressed the pulse by 62% to 14 ps. Hence, an extremely wide bandwidth from 0 to a first null of 100GHz was generated. This design is implemented in 90-nm CMOS process with a supply voltage of 1.2V.
international symposium on circuits and systems | 2014
Florian De Roose; Valentijn De Smedt; Wouter Volkaerts; Michiel Steyaert; Georges Gielen; Patrick Reynaert; Wim Dehaene
This paper proposes a novel integrated oscillator topology based on a transmission line. The frequency is extracted from the delay of the transmission line, which is intrinsically independent of temperature and supply variations. The architecture for the oscillator, guidelines for the design of the transmission line as well as the different building blocks are presented. The architecture is based on a phase-locked loop topology. The transmission line used has a 509 ps delay, an area of 2.26 mm2 and a 4.38 dB power loss. The effect of process variations on the transmission line is extensively investigated. A digital driver using CMOS inverters and an analog driver based on an OTA are proposed. Both have a good stability over temperature. The Gilbert cell is proposed as a detector at the output of the transmission line and the corresponding design considerations are shown. Closed loop simulations show fast locking, a variation of 8.3°C between -10°C and 85°C and a variation of 3.70/00 for Vdd ± 10%.
Analog Integrated Circuits and Signal Processing | 2015
Wouter Volkaerts; Michiel Steyaert; Patrick Reynaert