X. Llopart

Medipix2: A 64-k pixel readout chip with 55-/spl mu/m square elements working in single photon counting mode

The Medipix2 chip is a pixel-detector readout chip consisting of 256 /spl times/ 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. Each pixel cell contains around 500 transistors and occupies a total surface area of 55 /spl mu/m /spl times/ 55 /spl mu/m. A 20-/spl mu/m wide octagonal opening connects the detector and the preamplifier input via bump bonding. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to create a pulse if the preamplifier output falls within a defined energy window. These digital pulses are then counted with a 13-b pseudorandom counter. The counter logic, based in a shift register, also behaves as the input-output register for the pixel. Each cell also has an 8-b configuration register which allows masking, test-enabling and 3-b individual threshold adjust for each discriminator. The chip can be configured in serial mode and readout either serially or in parallel. The chip is designed and manufactured in a 6-metal 0.25-/spl mu/m CMOS technology. First measurements show an electronic pixel noise of 140 e~ root mean square (rms) and an unadjusted threshold variation around 360 e~ rms.

The Medipix3RX: a high resolution, zero dead-time pixel detector readout chip allowing spectroscopic imaging

The Medipix3 chips have been designed to permit spectroscopic imaging in highly segmented hybrid pixel detectors. Spectral degradation due to charge sharing in the sensor has been addressed by means of an architecture in which adjacent pixels communicate in the analog and digital domains on an event-by-event basis to reconstruct the deposited charge in a neighbourhood prior to the assignation of the hit to a single pixel. The Medipix3RX chip architecture is presented. The first results for the characterization of the chip with 300 μm thick Si sensors are given. ~ 72e− r.m.s. noise and ~ 40e− r.m.s. of threshold dispersion after chip equalization have been measured in Single Pixel Mode of operation. The homogeneity of the image in Charge Summing mode is comparable to the Single Pixel Mode image. This demonstrates both modes are suitable for X-ray imaging applications.

Timepix3: a 65K channel hybrid pixel readout chip with simultaneous ToA/ToT and sparse readout

The Timepix3, hybrid pixel detector (HPD) readout chip, a successor to the Timepix \cite{timepix2007} chip, can record time-of-arrival (ToA) and time-over-threshold (ToT) simultaneously in each pixel. ToA information is recorded in a 14-bit register at 40 MHz and can be refined by a further 4 bits with a nominal resolution of 1.5625 ns (640 MHz). ToT is recorded in a 10-bit overflow controlled counter at 40 MHz. Pixels can be programmed to record 14 bits of integral ToT and 10 bits of event counting, both at 40 MHz. The chip is designed in 130 nm CMOS and contains 256 × 256 pixel channels (55 × 55 μm2). The chip, which has more than 170 M transistors, has been conceived as a general-purpose readout chip for HPDs used in a wide range of applications. Common requirements of these applications are operation without a trigger signal, and sparse readout where only pixels containing event information are read out. A new architecture has been designed for sparse readout and can achieve a throughput of up to 40 Mhits/s/cm2. The flexible architecture offers readout schemes ranging from serial (one link) readout (40 Mbps) to faster parallel (up to 8 links) readout of 5.12 Gbps. In the ToA/ToT operation mode, readout is simultaneous with data acquisition thus keeping pixels sensitive at all times. The pixel matrix is formed by super pixel (SP) structures of 2 × 4 pixels. This optimizes resources by sharing the pixel readout logic which transports data from SPs to End-of-Column (EoC) using a 2-phase handshake protocol. To reduce power consumption in applications with a low duty cycle, an on-chip power pulsing scheme has been implemented. The logic switches bias currents of the analog front-ends in a sequential manner, and all front-ends can be switched in 800 ns. The digital design uses a mixture of commercial and custom standard cell libraries and was verified using Open Verification Methodology (OVM) and commercial timing analysis tools. The analog front-end and a voltage-controlled oscillator for 1.5625 ns timing resolution have been designed using full custom techniques.

Imaging properties of the Medipix2 system exploiting single and dual energy thresholds

Low noise, high resolution, and high dose efficiency are the common requirements for most X-ray imaging applications. The dose efficiency is especially important for medical imaging systems. We present the imaging performance of the Medipix2 readout chip bump bonded to a 300 mum thick Si detector as a function of the detection threshold, a free parameter not available in conventional charge integrating imaging systems. Spatial resolution has been measured using the modulation transfer function (MTF) and it varies between 8.2 line-pairs/mm and 11.0 line pairs/mm at an MTF value of 70%. An associated measurement of noise power spectrum (NPS) permits us to derive the detective quantum efficiency (DQE) which can be as a high as 25.5% for a broadband incoming spectrum. The influence of charge diffusion in the sensor together with threshold variation in the readout chip is discussed. Although the Medipix2 system is used in photon counting mode with a single threshold in energy, the system is also capable of counting within a given energy window as narrow as ~1.4 keV. First measurements and images using this feature reveal capabilities that allow identifying fluorescence and other sources of disturbance

Review of hybrid pixel detector readout ASICs for spectroscopic X-ray imaging

Semiconductor detector readout chips with pulse processing electronics have made possible spectroscopic X-ray imaging, bringing an improvement in the overall image quality and, in the case of medical imaging, a reduction in the X-ray dose delivered to the patient. In this contribution we review the state of the art in semiconductor-detector readout ASICs for spectroscopic X-ray imaging with emphasis on hybrid pixel detector technology. We discuss how some of the key challenges of the technology (such as dealing with high fluxes, maintaining spectral fidelity, power consumption density) are addressed by the various ASICs. In order to understand the fundamental limits of the technology, the physics of the interaction of radiation with the semiconductor detector and the process of signal induction in the input electrodes of the readout circuit are described. Simulations of the process of signal induction are presented that reveal the importance of making use of the small pixel effect to minimize the impact of the slow motion of holes and hole trapping in the induced signal in high-Z sensor materials. This can contribute to preserve fidelity in the measured spectrum with relatively short values of the shaper peaking time. Simulations also show, on the other hand, the distortion in the energy spectrum due to charge sharing and fluorescence photons when the pixel pitch is decreased. However, using recent measurements from the Medipix3 ASIC, we demonstrate that the spectroscopic information contained in the incoming photon beam can be recovered by the implementation in hardware of an algorithm whereby the signal from a single photon is reconstructed and allocated to the pixel with the largest deposition.

Charged particle tracking with the Timepix ASIC

A prototype particle tracking telescope was constructed using Timepix and Medipix ASIC hybrid pixel assemblies as the six sensing planes. Each telescope plane consisted of one 1.4 cm2 assembly, providing a 256 ×256 array of 55μm square pixels. The telescope achieved a pointing resolution of 2.4μm at the position of the device under test. During a beam test in 2009 the telescope was used to evaluate in detail the performance of two Timepix hybrid pixel assemblies; a standard planar 300μm thick sensor, and 285μm thick double sided 3D sensor. This paper describes a charge calibration study of the pixel devices, which allows the true charge to be extracted, and reports on measurements of the charge collection characteristics and Landau distributions. The planar sensor achieved a best resolution of 4.0±0.1μm for angled tracks, and resolutions of between 4.4 and 11μm for perpendicular tracks, depending on the applied bias voltage. The double sided 3D sensor, which has significantly less charge sharing, was found to have an optimal resolution of 9.0±0.1μm for angled tracks, and a resolution of 16.0±0.2μm for perpendicular tracks. Based on these studies it is concluded that the Timepix ASIC shows an excellent performance when used as a device for charged particle tracking.

X-ray imaging using single photon processing with semiconductor pixel detectors

More than 10 years experience with semiconductor pixel detectors for vertex detection in high energy physics experiments together with the steady progress in CMOS technology opened the way for the development of single photon processing pixel detectors for various applications including medical X-ray imaging. The state of the art of such pixel devices consists of pixel dimensions as small as 55 55 m 2 , electronic noise per pixel <100 e rms, signal-to-noise discrimination levels around 1000 e with a spread <50 e and a dynamic range up to 32 bits per pixel. Moreover, the high granularity of hybrid pixel detectors makes it possible to probe inhomogeneities of the attached semiconductor sensor.

Characterization of the Medipix3 pixel readout chip

The Medipix3 chip is a hybrid pixel detector readout chip working in Single Photon Counting Mode. It has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture charge deposited in overlapping clusters of four pixels is summed event-by-event and the incoming quantum is assigned as a single hit to the summing circuit with the biggest charge deposit (this mode of operation is called Charge Summing Mode (CSM)). In Single Pixel Mode (SPM) the charge reconstruction and the communication between neighbouring pixels is disabled. This is the operating mode in traditional detector systems. This paper presents the results of the characterization of the chip with electrical stimuli and radioactive sources.

The LHCb VELO upgrade

Abstract The LHCb experiment plans to have a fully upgraded detector and data acquisition system in order to take data with instantaneous luminosities up to 5 times greater than currently. For this reason the first tracking and vertexing detector, the VELO, will be completely redesigned to be able to cope with the much larger occupancies and data acquisition rates. Two main design alternatives, micro-strips or pixel detectors, are under consideration to build the upgraded detector. This paper describes the options presently under consideration, as well as a few highlights of the main aspects of the current R&D. Preliminary results using a pixel telescope are also presented.

A prototype hybrid pixel detector ASIC for the CLIC experiment

A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64 × 64 square pixels with 25 μm pitch. The main features include simultaneous 4-bit measurement of Time-over-Threshold (ToT) and Time-of-Arrival (ToA) with 10 ns accuracy, on-chip data compression and power pulsing capability.