Xi Tan

Predictive Digital Current Control of Single-Inductor Multiple-Output Converters in CCM With Low Cross Regulation

This paper presents a new digital current-mode control technique for single-inductor multiple-output converters in continuous-conduction mode. This predictive control method can calculate all the required duty cycles corresponding to the outputs for the next switching cycle. Since the calculation is based on every current reference representing the load current, all current control loops corresponding to different outputs are theoretically independent, which can greatly reduce the cross regulation. To avoid subharmonic oscillation, proper predictive digital current control is adopted. Inductor current estimation is used to remove the current sensing circuit, and corresponding calibration techniques are presented. Simulation and experimental results are given to verify the effectiveness of this control technique.

An Implantable RFID Sensor Tag toward Continuous Glucose Monitoring

This paper presents a wirelessly powered implantable electrochemical sensor tag for continuous blood glucose monitoring. The system is remotely powered by a 13.56-MHz inductive link and utilizes an ISO 15693 radio frequency identification (RFID) standard for communication. This paper provides reliable and accurate measurement for changing glucose level. The sensor tag employs a long-term glucose sensor, a winding ferrite antenna, an RFID front-end, a potentiostat, a 10-bit sigma-delta analog to digital converter, an on-chip temperature sensor, and a digital baseband for protocol processing and control. A high-frequency external reader is used to power, command, and configure the sensor tag. The only off-chip support circuitry required is a tuned antenna and a glucose microsensor. The integrated chip fabricated in SMIC 0.13-μm CMOS process occupies an area of 1.2 mm × 2 mm and consumes 50 μW. The power sensitivity of the whole system is -4 dBm. The sensor tag achieves a measured glucose range of 0-30 mM with a sensitivity of 0.75 nA/mM.

0.6–3-GHz Wideband Receiver RF Front-End With a Feedforward Noise and Distortion Cancellation Resistive-Feedback LNA

A novel wideband receiver RF front-end, including a resistive negative feedback wideband low-noise amplifier (LNA) with feedforward noise and distortion cancellation and a current commutating down conversion passive mixer with biquad trans-impedance amplifier, is presented in this paper. In comparison to conventional resistive negative feedback LNAs, theory analysis and experimental results for the proposed LNA circuit shows improved performance parameters, including voltage gain, noise figure (NF), and input-referred third-order intercept point (IIP3), especially helpful for wideband LNA design in modern deep-submicrometer CMOS. A wideband receiver RF front-end fabricated in 0.13-μm CMOS, based on the proposed feedforward noise and distortion-cancellation resistive-feedback LNA, has 42-48-dB conversion gain with 0.8-12-MHz tunable IF -3-dB bandwidth and 12-dB adjacent channel selectivity at 2 fp, -14-dBm IIP3, and 3-dB NF double-sideband with 10-kHz flicker-noise corner frequency.

Wireless sensor network for real-time perishable food supply chain management

The WSN nodes can monitor both environmental parameters and the states of motion.The WSN system is configurable according the requirements of applications.The non-joined EndDevice improved by network switching scheme is more energy-efficient.The functions and WSN nodes have been tested and validated with an external apparatus.The success rate of data communication is over 99%. Environment monitoring is essential to the perishable food supply chain management, since it provides important information to estimate the food quality and to predict its shelf life. In this work, a real-time perishable food supply chain monitoring system is developed based on ZigBee-standard wireless sensor network (WSN). Some important improvements including a configurable architecture for comprehensive sensors and an improved network switching scheme are designed to meet the application requirements. A tree-topology WSN system with 192 EndDevices and a star-topology WSN system with 80 EndDevices are implemented and evaluated in terms of both functions and performance. Test results show that the success rate of data communication is over 99%. Both theoretical analysis and realistic measurement results show that the EndDevices have a lifetime long enough for the application of supply chain monitoring.

Analysis, design and implementation of semi-passive Gen2 tag

An EPCglobal Gen2 compatible semi-passive (or be called battery-assisted passive) tag is proposed. The transmission link is studied to optimize power distribution in a backscatter RFID system. For long read range consideration, design targets for low power tag are given. The tag chip is implemented in SMIC 0.18 μm standard CMOS technology. A high efficiency AC-DC charge pump serves as a rectifier. A low power wake-up circuit detects the input energy level and controls a button cell battery to supply the chip. The equivalent tag power is 230 nW by measurement.

A semi-passive UHF RFID tag with on-chip temperature sensor

A semi-passive UHF temperature sensor tag compatible with ISO 18000-6C protocol Revision-1 is presented in this paper. Novel power management techniques are proposed to prolong battery life, including two-stage wake-up detection, optimized rectifier design for wireless recharge, quasi CC–CV battery charging, and on-chip battery voltage surveillance. Both real-time temperature sensing and temperature log function are implemented with a bandgap based PTAT circuit. It has a - 40∼100°C sensing range with ±1.6 °C accuracy. The tag is fabricated in 0.18 µm CMOS technology with EEPROM. Measured sensitivity and standby current are −23.7 dBm and 150 nA respectively.

A Multi-Band Low-Noise Transmitter With Digital Carrier Leakage Suppression and Linearity Enhancement

A low-noise multi-band transmitter for GSM quad-band and WCDMA is presented. Programmable parameters of the analog baseband and the RF frontend enable adaption for different protocols and frequency bands. A three-step carrier leakage calibration algorithm is proposed to suppress the leakage to -65 dBm at highest RF gain. Novel linearization methods are used in the low-pass filter and the driver power amplifier to meet the demand of 3G systems. The noise floor achieves -157 dBc/Hz at 190 MHz frequency offset in WCDMA band, which eliminates the need for external SAW filter.

A 1.04 µW Truly Random Number Generator for Gen2 RFID tag

This paper proposes a low power, low voltage Truly Random Number Generator (TRNG) for EPC Gen2 RFID tag. According to the special requirements of Gen2 tag, design considerations and tradeoffs among chip area, power consumption and randomicity are presented. The proposed TRNG is composed of an analog random seed generator which uses the oscillator sampling mechanism, and Linear Feedback Shift Registers (LFSR) for post digital processing. Realized in SMIC 0.18 µm standard CMOS process, the TRNG generates 16-bit random series at a speed of 40 kb/s, and their randomicity performance is verified by the FIPS 140−2 standard for security. Power consumption of the TRNG is only 1.04 µW with a minimum supply voltage of 0.8 V, and its total chip area is 0.05 mm2.

1.9∼2.6GHz tuning range variable gain low-noise amplifier with digital assisted automatic tuning loop

A novel wide tuning range variable gain differential low-noise amplifier (LNA) with digital assisted automatic tuning loop for multi-mode receiver is proposed in this paper. Common gate LNA with cross-coupled capacitor (CCC) and positive feedback is applied for tuning flexibility and high gain, low noise performance. Digital assisted automatic tuning mechanism reuses the output load inductor and capacitor tank to configure an auxiliary oscillator while tuning, and re-configures it back to narrowband LNA, without extra chip area and power consumption. A testchip is fabricated in 0.13µm CMOS. Measurement results show an LNA performance of 8∼26dB variable voltage gain, 2dB NF, −5.5dBm IIP3 and S11<−10dB. The digital assisted automatic frequency tuning range covers 1.9–2.6GHz with 1% tuning error. The circuit consumes 8mA with 1.2V power supply and the core layout size is 0.35mm×0.55mm.1

A 0.8ps minimum-resolution sub-exponent TDC for ADPLL in 0.13µm CMOS

This paper presents the design of a sub-exponent time-to-digital converter (TDC) that amplifies a time residue to improve both the time resolution and measurement range. The sub-exponent TDC quantizes the fractional time difference with a cascading chain of 2×time amplifiers. A digitally self-calibrated TA circuit is developed to achieve large input range and stable gain. Simulation results show that implemented in SMIC 0.13µm CMOS, the proposed TDC can achieve a minimum resolution of 0.8ps, a measurement range of 14bits, and a power dissipation of 2mW at 60MHz.