Xiaochuan Deng

Numerical analysis on the 4H-SiC MESFETs with a source field plate

A new structure of 4H-SiC MESFETs based on the source field plate technology is proposed in this paper. The source field plate has been applied not only to improve the breakdown voltage, but also to eliminate the drawback of low gain characteristics resulting from additional feedback capacitance associated with the field plate electrode. The off-state breakdown voltage was significantly improved by employing a source field plate electrode, and the highest value of 203 V was obtained with a source field plate length of 1.1 µm. As compared to the conventional structures, the MESFETs with a source field plate show an approximately 41% decrease in the gate-to-drain capacitance, which is responsible for the 2.2 dB gain improvement at 2 GHz. This is because the source field plate redistributes the electric fields in the gate-to-drain region and hence reduces the gate-to-drain capacitance in the intrinsic device. Therefore, the 4H-SiC MESFETs with the source field plate have superior dc and RF performances compared to similar devices based on the conventional structure.

Two-dimensional analysis of the gate?source distance scaling effects in 4H-SiC MESFETs

Two-dimensional dc and small-signal ac analyses of the gate?source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of the gate?source distance can improve device performance, enhancing drain current, transconductance and maximum oscillation frequency. This influence is associated with the dynamic characteristic of electrons in SiC MESFETs, which leads to a linear velocity regime in the source access region, even for high drain voltages. The variations of gate-to-source capacitance, gate-to-drain capacitance, cut-off frequency and maximum oscillation frequency with respect to the change in gate?source length have also been studied in detail. The obtained results can be used for a design guideline for the layout of 4H-SiC MESFETs.

Electro-thermal analytical model and simulation of the self-heating effects in multi-finger 4H-SiC power MESFETs

A three-dimensional (3D) electro-thermal analytical model to accurately predict the temperature distribution in multi-finger silicon carbide (SiC) based high-power field-effect transistors has been proposed. The results of the analytical and numerical investigation of self-heating effects have also been presented. The analytical results are well supported by the two-dimensional electro-thermal simulation results obtained by Atlas. The models give an approximate but explicit influence on temperature distribution in terms of the structure parameter and operation condition, such as the gate-to-gate pitch, the thickness of the substrate and the source–drain bias. The obtained results can be used for optimization of the thermal design of the multi-finger 4H-SiC power MESFETs.

Design and Optimization of a Versatile 700 V SPIC Process Using a Fully Implanted Triple-well Technology

A SPIC (smart power IC) process with a wide range of devices up to 700 V has been designed and optimized. An important feature is that all the devices have been realized by using a fully implanted triple-well technology in a P-type single crystal without epitaxial layer or buried layer. The results of this process are the low fabrication cost, simple process and small chip area. In addition to high voltage lateral DMOS (HV-LDMOS) transistor with the breakdown voltage (BV) 700 V as well as JFET device and low voltage CMOS (LV-CMOS) transistors have been fabricated using this process, a NPN type bipolar transistor is also realized and optimized by a additional implantation and drive-in. The major features of this process for SPIC fabrication have been clearly demonstrated

The effect of the surface recombination on current gain for 4H-SiC BJT

Two-dimensional analysis of the surface recombination on current gain for 4H-SiC BJT (bipolar junction transistor) is studied. The experiment is well-matched with the simulation result, which is modeled by the continuous interface state distributions replacing the single interface state trap. The mechanism of current gain degradation is discussed.

Improved Characteristics of 4H-SiC MESFET with Multi-recessed Drift Region

4H-SiC MESFET with multi-recessed drift region is proposed and the DC and RF characteristics are analyzed in this paper by 2D numerical simulation. The simulated results show that the breakdown voltage is about 68% larger than that of the conventional structure. The calculated maximum output power density at operation point VGS=-10V, VDS=40V are 9.6W/mm and 6.2W/mm respectively for 4H-SiC MESFETs with multi-recessed drift region structure and conventional structure. The multi-recesses eliminate the spaces adjacent to gate and stopped the depletion region extending towards drain and source. Compared to the conventional structure, the gate-source capacitance (CGS) and drain-gate capacitance (CDG) of multi-recessed drift region structure have both been reduced, which will result in a superior RF performance.

High Performance 4H-SiC MESFETs with a Source Field Plated Structure

A new structure of 4H-SiC MESFET based on the source field plate technology is proposed in this paper. The source field plate has been applied not only to improve the breakdown voltage, but also to eliminate the drawback of low gain characteristics relatively resulted from additional feedback capacitance associated with the field plate electrode. The off-state breakdown voltage was significantly improved by employing source field plate electrode, and the highest of 203V was obtained. As compared to the conventional structures, the MESFETs with source field plate show an approximately 41% decrease in gate-to-drain capacitance, which is responsible for the 2.2dB gain improvement at 2GHz. Therefore, the 4H-SiC MESFETs with source field plate have superior DC and RF performances compared to the similar devices based on the conventional structure.

High breakdown voltage 4H-SiC Schottky Barrier Diodes with floating metal rings for MMIC applications

A new high voltage 4H-SiC Schottky barrier diode (SBD) structure for monolithic microwave integrated circuit (MMIC) applications is proposed. It employs one or more floating metal rings (FMRs) which work similar to guard rings. Influence of FMRs structure on the breakdown voltage and cut-off frequencies of the SBD were studied by numerical device modeling. As compared to the one without ring, about 107% and 134% improvement in breakdown voltage while only about 17% and 25% decrease in cut-off frequencies have been achieved in SBDs with one and two rings

Fabrication characteristics of 1.2kV SiC junction barrier schottky rectifiers with etched implant junction termination extension

An etched implanted junction termination extension (JTE) is presented for high-voltage 4H-SiC JBS rectifiers. Unlike the conventional JTE structure, the proposed structure utilizes multiple etching steps to achieve the optimum JTE concentration range. Experimental and simulation results show that the JBS rectifier with etched JTE can improve the blocking performance compared to a conventional JTE structure and decrease the sensitivity of any possible variation in processing condition. The fabricated SiC JBS rectifier showed the forward on-state voltage characteristic is 1.3V at room temperature and the blocking voltage of 1.2kV.

High current gain 4H-SiC BJT for limiting surface states effect

In this paper, a novel 4H-SiC BJT is proposed to obtain a high current gain by separating electron and hole near the SiC/SiO2 surface. It is effective to improve the current gain by extending the emitter metal to overlap the passivation layer on the extrinsic base which modulates the surface potential. Compared with the conventional BJTs, the surface recombination rate decreases and the current gain improves by 63.2% with the compatible process technology. The optimized size is oxide layer thickness in the order of 50 nm and overlapping metal length in the order of 4 μm.