Xiaojun Zhai

OCR-based neural network for ANPR

Optical Character Recognition (OCR) is the last stage in an Automatic Number Plate Recognition System (ANPRs). In this stage the number plate characters on the number plate image are converted into encoded texts. In this paper, an Artificial Neural Network (ANN) based OCR algorithm for ANPR application is presented. A database of 3700 UK binary character images have been used for testing the performance of the proposed algorithm. Results achieved have shown that the proposed algorithm can meet the real-time requirement of an ANPR system and can averagely process a character image in 8.4ms with 97.3% successful recognition rate.

Real-time optical character recognition on field programmable gate array for automatic number plate recognition system

The last main stage in an automatic number plate recognition system (ANPRs) is optical character recognition (OCR), where the number plate characters on the number plate image are converted into encoded texts. In this study, an artificial neural network-based OCR algorithm for ANPR application and its efficient architecture are presented. The proposed architecture has been successfully implemented and tested using the Mentor Graphics RC240 field programmable gate arrays (FPGA) development board equipped with a 4M Gates Xilinx Virtex-4 LX40. A database of 3570 UK binary character images have been used for testing the performance of the proposed architecture. Results achieved have shown that the proposed architecture can meet the real-time requirement of an ANPR system and can process a character image in 0.7 ms with 97.3% successful character recognition rate and consumes only 23% of the available area in the used FPGA.

License plate localisation based on morphological operations

Automatic Number Plate Recognition (ANPR) systems allow users to track, identify and monitor moving vehicles by automatically extracting their number plates. This paper presents an improved method to locate car plates in an ANPR system. The proposed method is based on morphological open and close operations where different Structuring Elements (SE) are used to maximally eliminate non-plate region and enhance plate region. This method has been tested using a database of UK number plates and results achieved have shown significant improvements in terms of the detection rate compare to other existing plate localisation systems.

Real-time license plate localisation on FPGA

Automatic Number Plate Recognition (ANPR) systems have become an important tool to track stolen car, access control and monitor the traffic. The fundamental requirements of an ANPR system are image capture using an ANPR camera, and processing of the captured image. The image processing part, which is a computationally intensive task, includes two stages i.e. plate localisation and character recognition. This paper presents an improved license plate localisation (LPL) algorithm based on modified Sobel vertical edge detection operator and two morphological operations suitable for FPGA implementation. The algorithm has been successfully implemented on a Xilinx Virtex-4 FPGA and tested using a database of 1000 images that contains UK number plates. It consumes 28% of the available on-chip resources, runs with a maximum frequency of 114.20 MHz, has a detection rate of 99.1% and capable of processing one image (640×480) in 3.8ms.

Multi-sensor data fusion in wireless sensor networks for planetary exploration

The SWIPE (Space Wireless Sensor Networks for Planetary Exploration) project uses Wireless Sensor Networks (WSN) to characterise the surface of the Moon. The envisaged scenario is that hundreds of small wireless sensor nodes dropped onto the Moon surface will collect scientific measurements. An ad-hoc WSN connecting these nodes will propagate the measurement data to sink nodes for uploading to a lunar orbiter and a subsequent transmission to Earth. The data gathered from the sensors will be processed using state-of-the-art data fusion techniques to overcome the restricted energy and bandwidth resources. In this paper, we first provide a short survey of classical data fusion techniques for WSNs. We then introduce data fusion architectures for the SWIPE project. Building on this, we propose data processing algorithms that enable energy conservation and processing efficiency in the proposed SWIPE architectures. The proposed algorithms are evaluated via a series of simulation models. The results show that the proposed algorithms can efficiently reduce the amount of the transmitted scientific data providing a good level of accuracy in the data reconstruction. Furthermore, they are able to correctly evaluate the node health status.

MLP Neural Network Based Gas Classification System on Zynq SoC

Systems based on wireless gas sensor networks offer a powerful tool to observe and analyze data in complex environments over long monitoring periods. Since the reliability of sensors is very important in those systems, gas classification is a critical process within the gas safety precautions. A gas classification system has to react fast in order to take essential actions in the case of fault detection. This paper proposes a low latency real-time gas classification service system, which uses a multi-layer perceptron (MLP) artificial neural network to detect and classify the gas sensor data. An accurate MLP is developed to work with the data set obtained from an array of tin oxide (SnO2) gas sensor, based on convex micro hotplates. The overall system acquires the gas sensor data through radio-frequency identification (RFID), and processes the sensor data with the proposed MLP classifier implemented on a system on chip (SoC) platform from Xilinx. Hardware implementation of the classifier is optimized to achieve very low latency for real-time application. The proposed architecture has been implemented on a ZYNQ SoC using fixed-point format and the achieved results have shown that an accuracy of 97.4% has been obtained.

A Method for Detecting Abnormal Program Behavior on Embedded Devices

A potential threat to embedded systems is the execution of unknown or malicious software capable of triggering harmful system behavior, aimed at theft of sensitive data or causing damage to the system. Commercial off-the-shelf embedded devices, such as embedded medical equipment, are more vulnerable as these type of products cannot be amended conventionally or have limited resources to implement protection mechanisms. In this paper, we present a self-organizing map (SOM)-based approach to enhance embedded system security by detecting abnormal program behavior. The proposed method extracts features derived from processors program counter and cycles per instruction, and then utilises the features to identify abnormal behavior using the SOM. Results achieved in our experiment show that the proposed method can identify unknown program behaviors not included in the training set with over 98.4% accuracy.

Space Wireless Sensor Networks for planetary exploration: Node and network architectures

Wireless Sensor Networks (WSNs) are made of a usually large number of nodes deployed over an area of interest in order to monitor specific phenomena. WSNs constitute a promising technology for planetary exploration, since they can be deployed in order to monitor the environmental conditions on a planets surface, also in view of possible manned missions. This paper deals with the design of node and network architectures in a WSN targeted for planetary exploration, with a particular focus on the challenges, the driving principles and the design solutions adopted at WSN node and network level. Also, the paper introduces the basic architecture supporting data fusion at node and network level, which plays a fundamental role in order to increase overall WSN performances.

Automatic number plate recognition system on an ARM-DSP and FPGA heterogeneous SoC platforms

The ARM-DSP based ANPR system described is designed for commercial applications where the need for low power, low prices and real time systems is vital. A single FPGA can also be added as a plug-in to the ARM-DSP based hardware SoC, depending on the extra resources needed for the application. The overall results have shown that it is possible to use cheaper off-the-shelf ARM-DSPs and FPGAs multicore processors for standalone ANPR systems through device and algorithm optimisation to achieve real-time performance at higher recognition rate using efficient algorithms.

Improved number plate localisation algorithm and its efficient field programmable gate arrays implementation

Number plate localisation is a very important stage in an automatic number plate recognition (ANPR) system and is computationally intensive. This study presents a low complexity with high-detection rate number plate localisation algorithm based on morphological operations together with an efficient multiplier-less architecture based on that algorithm. The proposed architecture has been successfully implemented and tested using a Mentor Graphics RC240 FPGA (field programmable gate arrays) development board equipped with a 4M-gate Xilinx Virtex-4 LX40. Two database sets sourced from the UK and Greece and including 1000 and 307 images, respectively, both with a resolution of 640 × 480, have been used for testing. Results achieved have shown that the proposed system can process an image in 4.7 ms, while achieving a 97.8% detection rate and consuming only 33% of the available area of the FPGA.