Xiaomeng Chen

AlGaN/GaN MIS-HFET with improvement in high temperature gate bias stress-induced reliability

CMOS-compatible GaN-on-silicon technology with excellent D-mode MISHFET performance is realized. A low specific contact resistance R_c (0.35 Ω-mm) is achieved by Au-free process. MIS-HFET with a gate-drain distance (L_GD) of 15 μm exhibits a large breakdown voltage (BV) (980 V with grounded substrate) and a low specific on-resistance (R _ON,_sp) (1.45 mΩ-cm²). The importance of epitaxial quality in a key industrial qualification item: high temperature gate bias (HTGB) stress-induced voltage instability issue is figured out and a breakthrough by optimizing GaN epitaxial layer for improvement of MIS-HFET is demonstrated. A low V_th shift of the optimized MIS-HFET is achieved ~ 0.14V with qualification stress condition V_G of -15 V at ambient temperature of 150 oC for 128 hours.

Improved trap-related characteristics on SiN x /AlGaN/GaN MISHEMTs with surface treatment

In this paper, the reliable SiNx/AlGaN/GaN MISHEMTs on silicon substrate with improved trap-related characteristics have been well demonstrated. The devices with our proposed treatment method showed less deep-level traps and more Si surface donors at SiNx-AlGaN interface. The trap related device characteristics are also improved by using our optimized treatment method. The devices with proposed treatment method exhibit less current collapse and better positive bias temperature stability of threshold voltage. All the results suggest that the proposed treatment method is very effective to improve the slow-trap related device reliability.