Xingbi Chen

Optimization of the specific on-resistance of the COOLMOS/sup TM/

The optimized values for the physical and geometrical parameters of the p- and n-regions used in the voltage-sustaining layer of the COOLMOS/sup TM/ are presented. Design of the parameters is aimed to produce the lowest specific on-resistance, R/sub on/ for a given breakdown voltage, V/sub B/. A new relationship between the R/sub on/ and V/sub B/ for the COOLMOS/sup TM/ is developed as R/sub on/=C/spl middot/V/sub B//sup 1.32/, where the constant C is dependent on the cell dimension and pattern geometry. It is also found that by putting a thin layer of insulator between the p-region and its neighboring n-regions, the value of R/sub on/ can be further reduced. The possibility of incorporating the insulating layer may open up opportunities for practical implementation of the COOLMOS/sup TM/ for volume production.

Theory of a novel voltage-sustaining layer for power devices

Abstract The theory of a novel voltage-sustaining layer for power devices, called a Composite Buffer layer (CB-layer for short) is proposed. The CB-layer can be implemented in several ways, one particular implementation is used here, which consists of alternating n- and p-type regions, that are parallel to the direction of the applied electric field. In the off-state, the fields induced by the depletion charges of both region types compensate each other to allowing the doping in both n-regions and p-regions to be very high without causing a reduction of the breakdown voltage. In the onstate the heavy doping ensures the voltage drop is very low and that the saturation current density high. A simple relationship between the specific on-resistance and R on and the sustaining voltage V B can be shown to be R on =2.53 × 10 −7 bV B 1.23 ωcm 2 , where the breadth b (in μm) of each region is much smaller than the thickness W. The design method of the CB-layer is discussed in some detail. The simulation results are shown to be in perfect agreement with the theory. The structure has application to a wide variety of different power devices. An RMOST structure has been used to demonstrate the benefits of the technique in the paper, for which excellent performance is demonstrated.

Theory of optimum design of reverse-biased p-n junctions using resistive field plates and variation lateral doping

Abstract The effect of the reduction of the peak field at the edges of reverse-biased p-n junctions by the resistive field plate (RFP) and variation lateral doping (VLD) is explained with the surface charges induced by their structures. Analytical solutions of the field profile under the RFP and under the VLD were found, from which the optimum doping profile of the VLD can also be found. The relations between the breakdown voltage and the surface depletion width for these two structures are proposed. The realization of the optimum VLD by an approach using multiple zones of the JTE is proved to be satisfactory.

A Vertical Power MOSFET With an Interdigitated Drift Region Using High-

A vertical power MOSFET with an interdigitated drift region using high-

k

k

Insulator

(Hk) insulator (Hk-MOSFET) is studied. Due to the fact that most of the electric displacement lines produced by the charges of the depleted drift region under reverse bias are through the Hk insulator, much heavier doping concentration can be used in the drift region when comparing with a conventional MOSFET with the same breakdown voltage. It is shown that the specific on-resistance of the Hk-MOSFET is comparable to that of the superjunction MOSFET (SJ-MOSFET) with the same breakdown voltage. The turn-on and turn-off times are found to be little longer than those of the conventional MOSFET and the SJ-MOSFET. The theoretical results of the electrical characteristics are in good agreement with the results from numerical simulations.

Analysis and Fabrication of an LDMOS With High-Permittivity Dielectric

A lateral double-diffusion MOSFET with a uniform high-permittivity (HK) dielectric field plate (FP) is manufactured and presented in this letter. The HK dielectric FP is capable of cutting both electric peak fields at the channel p-n junction and the edge of FP, providing higher breakdown voltage (BV) based on a novel mechanism. The Pb(Zr0.53, Ti0.47)O3 (PZT) is taken as the HK dielectric material for its large preanneal permittivity. The test results indicate that, based on two identical devices except for the dielectric material, the BV of the one with PZT FP is more than three times of that of the counterpart with a SiO2 dielectric, approximately 350 and 100 V, respectively.

Lateral high-voltage devices using an optimized variational lateral doping

A novel high-voltage generic power device structure based on an optimum variation in the lateral doping profile is proposed. The structure is implemented with a series of zones having piece-wise constant doping located in the field sustaining region of the device. The structure has been evaluated as an integrated component in a range of high-voltage devices, including MOST, JFET and BJT. The simulation results show the breakdown voltages achieved by the different structures can reach 85% of that, calculated for an equivalent parallel plane abrupt junction. The on-resistance of each device is very low while the switching speed is very high. Among these devices, the MOST shows the best improvement in performance. Since these lateral devices are compatible with modern sub-micrometre IC-technology, and are capable of self-isolation, they are very attractive for applications in HVIC and PIC processes.

A High-Speed Deep-Trench MOSFET With a Self-Biased Split Gate

A split-gate deep-trench MOSFET (DT-MOS) with its split gate self-biased to an integrated low voltage supply is proposed. Due to the split gate being biased to an approximately constant voltage, this structure has a smaller amount of gate-to-drain charge Qgd without increase in the specific on-resistance Ron, compared with the conventional DT-MOS. Numerical simulation results show that the figure of merit (FOM = Qgd ·Ron) is largely reduced, compared with that of the conventional DT-MOS.

Optimization of Specific On-Resistance of Balanced Symmetric Superjunction MOSFETs Based on a Better Approximation of Ionization Integral

A breakdown voltage model based on the 2-D analytical model of the electric field distributions for the balanced and symmetric superjunction (SJ) MOSFET is presented and used to explain the different breakdown mechanisms as a function of column doping concentrations and widths. It is observed that breakdowns simultaneously occur along different electric field lines across some special symmetric points when the drift region is not fully depleted. Moreover, the minimum specific on-resistance can be obtained when the ionization integrals along these electric field lines are both in unity. For a breakdown voltage larger than 600 V, the minimum specific on-resistance Ron of the SJ structure can be reduced by larger than 13 % compared with the “suboptimum” case in the previous literature. Comparisons of results from the proposed model and simulation data show that the approximation solution exhibits excellent accuracy. The dependence values of the breakdown voltages on charge imbalance and the transient characteristics are also discussed.