Xuan Sang Nguyen

Correlation of a generation-recombination center with a deep level trap in GaN

We report on the identification of a deep level trap centre which contributes to generation-recombination noise. A n-GaN epilayer, grown by MOCVD on sapphire, was measured by deep level transient spectroscopy (DLTS) and noise spectroscopy. DLTS found 3 well documented deep levels at Ecu2009−u20090.26u2009eV, Ecu2009−u20090.59u2009eV, and Ecu2009−u20090.71u2009eV. The noise spectroscopy identified a generation recombination centre at Ecu2009−u20090.65u2009±u20090.1u2009eV with a recombination lifetime of 65 μs at 300u2009K. This level is considered to be the same as the one at Ecu2009−u20090.59u2009eV measured from DLTS, as they have similar trap densities and capture cross section. This result shows that some deep levels contribute to noise generation in GaN materials.

Heteroepitaxial growth of In0.30Ga0.70As high-electron mobility transistor on 200 mm silicon substrate using metamorphic graded buffer

We report on the growth of an In0.30Ga0.70As channel high-electron mobility transistor (HEMT) on a 200 mm silicon wafer by metal organic vapor phase epitaxy. By using a 3 μm thick buffer comprising a Ge layer, a GaAs layer and an InAlAs compositionally graded strain relaxing buffer, we achieve threading dislocation density of (1.0 ± 0.3) × 107 cm−2 with a surface roughness of 10 nm RMS. No phase separation was observed during the InAlAs compositionally graded buffer layer growth. 1.4 μm long channel length transistors are fabricated from the wafer with IDS of 70 μA/μm and gm of above 60 μS/μm, demonstrating the high quality of the grown materials.

Deep level traps in GaN LEDs grown by metal organic vapour phase epitaxy on an 8 inch Si(111) substrate

Deep level traps present in GaN LED grown on 8 in. Si substrate were revealed by deep level transient spectroscopy (DLTS). One electron trap located at E C − 0.7 eV was revealed in the n-GaN barrier layer. Two electron traps and one hole trap were observed in the p-GaN layer. They are located at E C − 0.60 eV, E C − 0.79 eV and E V + 0.70 eV. The total trap density in both the n-GaN barrier layer and the p-GaN layer of the LED is in order of 1014 cm−3, which is comparable with that found in GaN epi-layer grown on sapphire.

MOCVD Growth of High Quality InGaAs HEMT Layers on Large Scale Si Wafers for Heterogeneous Integration With Si CMOS

We report on the growth of In_0.30Ga_0.70As channel high electron mobility transistor (HEMT) epi-layers on a 200-mm Si substrate by metal-organic-chemical-vapor-deposition. The HEMT layers were grown on the Si substrate by using a ~3-<inline-formula> <tex-math notation=LaTeX>

Characterisation of defects generated during constant current InGaN-on-silicon LED operation

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In 0.30 Ga 0.70 As QW MOSFETs with peak mobility exceeding 3000 cm 2 /V·s fabricated on Si substrates

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(Invited) SiGe and III-V Materials and Devices: New HEMT and LED Elements in 0.18-Micron CMOS Process and Design

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Preventing phase separation in MOCVD-grown InAlAs compositionally graded buffer on silicon substrate using InGaAs interlayers

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Deep level traps in semi-polar n-GaN grown on patterned sapphire substrate by metalorganic vapor phase epitaxy

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Growth of InGaAs-channel transistor layers on large-scale Si wafers for HeteroIntegration with Si CMOS

</tex-math></inline-formula>-doped InAlAs bottom barrier, a ~15-nm thick InGaAs channel, a ~8-nm InGaP top barrier layer and a heavily doped InGaAs contact layer. MOSHEMTs with channel length down to 130 nm were fabricated. The devices achieve a peak transconductance of <inline-formula> <tex-math notation=LaTeX>