Y. Kilic

Testing analog circuits by supply voltage variation and supply current monitoring

A technique for sensitizing faults in analog circuits by varying the supply voltage and monitoring the supply current is discussed. The detection of short circuit faults is demonstrated with a simple CMOS circuit. The technique is applied to a larger analog circuit and significantly improved fault cover is obtained.

Behavioural modelling of operational amplifier faults using analogue hardware description languages

The use of behavioural modelling for operational amplifiers has been well known for many years and previous work has included modelling of specific fault conditions using a macro-model. In this paper, the models are implemented in a more abstract form using analogue hardware description languages (HDL), including MAST, taking advantage of the ability to control the behaviour of the model using high-level fault condition states. The implementation method allows a range of fault conditions to be integrated without switching to a completely new model. The various transistor faults are categorised, and used to characterise the behaviour of the HDL models. Simulations compare the accuracy and speed of the transistor and behavioural level models under a set of representative fault conditions.

Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS

The use of behavioural modelling for operational amplifiers has been well known for many years and previous work has included modelling of specific fault conditions using a macro-model. In this paper, the models are implemented in a more abstract form using an Analogue Hardware Description Language (AHDL), VHDL-AMS, taking advantage of the ability to control the behaviour of the model using high-level fault condition states. The implementation method allows a range of fault conditions to be integrated without switching to a completely new model. The various transistor faults are categorised, and used to characterise the behaviour of the HDL models. Simulations compare the accuracy and speed of the transistor and behavioural level models under a set of representative fault conditions.

Process variation independent built-in current sensor for analogue built-in self-test

A new design of built-in current sensor for dynamic supply current testing of analogue integrated circuits is proposed. The sensor has been designed and realized with AMS 0.8 /spl mu/m CYE CMOS technology. The sensor occupies 0.019 mm/sup 2/ silicon area, which is almost as big as a simple two-stage CMOS opamp. Unlike previously published sensors, this new built-in current sensor is process variation independent.