Yang Sui

Top-gated graphene field-effect-transistors formed by decomposition of SiC

Top-gated, few-layer graphene field-effect transistors (FETs) fabricated on thermally decomposed semi-insulating 4H-SiC substrates are demonstrated. Physical vapor deposited SiO2 is used as the gate dielectric. A two-dimensional hexagonal arrangement of carbon atoms with the correct lattice vectors, observed by high-resolution scanning tunneling microscopy, confirms the formation of multiple graphene layers on top of the SiC substrates. The observation of n-type and p-type transition further verifies Dirac Fermions’ unique transport properties in graphene layers. The measured electron and hole mobilities on these fabricated graphene FETs are as high as 5400 and 4400cm2∕Vs, respectively, which are much larger than the corresponding values from conventional SiC or silicon.

Optimization of on -State and Switching Performances for 15–20-kV 4H-SiC IGBTs

The 4H-SiC p-channel IGBTs designed to block 15 and 20 kV are optimized for minimum loss (on-state plus switching power) by adjusting the parameters of the JFET region, drift layer, and buffer layer, using 2-D MEDICI simulations. Switching loss exhibits a strong dependence on buffer layer thickness, doping, and lifetime due to their influence on the current tail. In contrast, drift layer lifetime has little effect on the crossover frequency at which the MOSFET and IGBT have equal loss.

High-Voltage Self-Aligned p-Channel DMOS-IGBTs in 4H-SiC

SiC power MOSFETs designed for blocking voltages of 10 kV and higher face the problem of high drift layer resistance that gives rise to a high internal power dissipation in the ON -state. For this reason, the ON-state current density must be severely restricted to keep the power dissipation below the package limit. We have designed, optimized, and fabricated high-voltage SiC p-channel doubly-implanted metal-oxide-semiconductor insulated gate bipolar transistors (IGBTs) on 20-kV blocking layers for use as the next generation of power switches. These IGBTs exhibit significant conductivity modulation in the drift layer, which reduces the ON-state resistance. Assuming a 300 W/cm2 power package limit, the maximum currents of the experimental IGBTs are 1.2x and 2.1x higher than the theoretical maximum current of a 20-kV MOSFET at room temperature and 177 degC, respectively.

Numerical Study of the Turnoff Behavior of High-Voltage 4H-SiC IGBTs

The turnoff behavior of high-voltage 4H-SiC p-channel insulated gate bipolar transistors is investigated by 2-D numerical simulations. Minority carrier lifetime in the nonpunch-through buffer layer is found to be the major factor determining switching loss.

Power MOSFETs, IGBTs, and thyristors in SiC: Optimization, experimental results, and theoretical performance

In this paper we present recent experimental results on SiC MOSFETs, IGBTs, and thyristors, and propose a consistent methodology for comparing unipolar and bipolar power devices as a function of blocking voltage and switching frequency.

Design, Simulation, and Characterization of High-Voltage SiC p-IGBTs

We have designed, simulated, fabricated, and characterized high-voltage 4H-SiC p-channel DMOS-IGBTs on 20 kV blocking layers for use as the next generation of power switching devices. These p-IGBTs exhibit significant conductivity modulation in the drift layer. The maximum currents of the experimental p-channel IGBTs are 1.2x and 2.1x higher than the ideal 20 kV n-channel DMOSFETs at room temperature and 175°C, respectively.

On-State and Switching Performance of High-Voltage 15 – 20 kV 4H-SiC DMOSFETs and IGBTs

We compare the on-state and switching performance of high-voltage 4H-SiC n-channel DMOSFETs and p-channel IGBTs within a three-dimensional parameter space defined by blocking voltage, switching frequency, and current density. We determine the maximum current density each device can carry at a given switching frequency, such that the total power dissipation is 300 W/cm2. The IGBT current depends strongly on lifetime in the NPT buffer layer, and only weakly on lifetime in the drift layer. The MOSFET current is essentially independent of frequency.

Device Options and Design Considerations for High-Voltage (10-20 kV) SiC Power Switching Devices

We compare the on-state characteristics of five 4H-SiC power devices designed to block 20 kV. At such a high blocking voltage, the on-state current density depends heavily on the degree of conductivity modulation in the drift region, making the IGBT and thyristor attractive devices for high blocking voltages.

Epitaxially grown graphene field-effect transistors with electron mobility exceeding 1500 cm 2 /Vs and hole mobility exceeding 3400 cm 2 /Vs

In this paper, we report, for the first time, the observation of n-type and p-type transition on epitaxially grown graphene films by top-gate bias. More importantly, the measured electron and hole mobility on fabricated top-gate graphene field-effect transistors exceeds 1500 cm2/Vs and 3400 cm2/Vs, respectively.

Device options for high-voltage SiC power switching devices

Silicon carbide power switching devices have made remarkable progress in the past decade. As blocking voltage increases, the resistance of power switches becomes dominated by the drift region, and the advantage of SiC over silicon increases. This is illustrated by the degree to which SiC unipolar devices are approaching their theoretical limits at blocking voltages around 10 kV. Efforts are currently underway to develop power switching devices for the 15-25 kV regime