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Featured researches published by Yani Li.


IEICE Electronics Express | 2013

A highly efficient interface circuit for ultra-low-voltage energy harvesting

Zheng Yang; Yani Li; Jingmin Wang; Zhangming Zhu; Yintang Yang

Based on SMIC 0.18μm standard CMOS technology, an input-powered vibrational energy harvesting interface circuit is proposed. It can be applied in energy harvesting devices for the extremely low voltage and high conversion rate. The simulation results show that the minimum input voltage could be as low as 0.15V by utilizing bulk-driven technique. Correspondingly, the voltage conversion efficiency can reach up to 80%. And the power conversion efficiency is also 80% when voltage equals to 0.25V. The proposed input-powered interface circuit, compared with the conventional output-powered circuits, can automatically shut down when the input voltage amplitude is low enough, thereby avoiding unnecessary energy loss.


Journal of Power Electronics | 2015

An Input-Powered High-Efficiency Interface Circuit with Zero Standby Power in Energy Harvesting Systems

Yani Li; Zhangming Zhu; Yintang Yang; Chaolin Zhang

This study presents an input-powered high-efficiency interface circuit for energy harvesting systems, and introduces a zero standby power design to reduce power consumption significantly while removing the external power supply. This interface circuit is composed of two stages. The first stage voltage doubler uses a positive feedback control loop to improve considerably the conversion speed and efficiency, and boost the output voltage. The second stage active diode adopts a common-grid operational amplifier (op-amp) to remove the influence of offset voltage in the traditional comparator, which eliminates leakage current and broadens bandwidth with low power consumption. The system supplies itself with the harvested energy, which enables it to enter the zero standby mode near the zero crossing points of the input current. Thereafter, high system efficiency and stability are achieved, which saves power consumption. The validity and feasibility of this design is verified by the simulation results based on the 65 nm CMOS process. The minimum input voltage is down to 0.3 V, the maximum voltage efficiency is 99.6% with a DC output current of 75.6 μA, the maximum power efficiency is 98.2% with a DC output current of 40.4 μA, and the maximum output power is 60.48 μW. The power loss of the entire interface circuit is only 18.65 μW, among which, the op-amp consumes only 2.65 μW.


Journal of Circuits, Systems, and Computers | 2015

A 20-mV Input DC/DC Converter for Energy Harvesting Applications

Zheng Yang; Jingmin Wang; Yani Li; Yintang Yang

A low input step-up DC/DC converter and power manager in 0.18-μm CMOS process is presented. The proposed converter can work with the input voltage as low as 20 mV. The extremely low input voltage makes it suitable for energy harvesting and power management. Four logic controlled outputs provide the best voltage for various applications to accommodate low power design requirements. A low current low dropout regulator (LDO) is utilized to provide a regulated 2.2 V output for powering low power processors or other low power integrated circuit (ICs). Reserve energy on the storage capacitor CSTORE provides power when the input voltage source is unavailable, thus prolongs the life of the system and expands the application range. Extremely low quiescent current (6 μA) and high efficiency design (64%@300 μA load current) ensure the fastest possible charge times of the output reservoir capacitor. This work provides a complete power management solution for wireless sensing and data acquisition.


IEICE Electronics Express | 2015

An ultra-low-voltage self-powered energy harvesting rectifier with digital switch control

Yani Li; Zhangming Zhu; Yintang Yang; Chaolin Zhang

This paper presents an ultra-low-voltage high-efficiency interface circuit for energy harvesting, which features self-powered design and digital switch control. The proposed rectifier includes bridge rectifier and active diode. The former introduces self-driven switches and ultra-low voltage divider to reduce the voltage drop for wide output voltage swing. The latter adopts a common-gate comparator as switch control block to output a nearly digital signal, thereby improving dynamic response and antinoise ability. The entire circuit exhibits good conversion efficiency and stability. Its minimum input voltage is down to 225mV. The maximum voltage efficiency reaches to 96.3%, supplying the output current of 29 μA and the output power of 15.43 μW. The maximum power efficiency is 96.5%, providing the output current of over 16.1 μA and the output power of 5.19 μW. The whole circuit consumes the power loss of 1.42 μW.


Journal of Circuits, Systems, and Computers | 2017

A Novel Interface Circuit with 99.2% MPPT Accuracy and 1.3% THD for Energy Harvesting

Yani Li; Zhangming Zhu; Yintang Yang; Yadong Sun; Xu Wang

To improve conversion efficiency and output quality of the energy harvester, a novel interface circuit with composite maximum power point tracking (MPPT) in energy harvesting applications is proposed in this paper. By using the ultra-low-voltage multiplier with digital control and simple one-cycle variable frequency technique, the converter realizes fast power tracking and high conversion efficiency, and minimizes the power consumption and harmonics, thereby obtaining high tracking precise and low total harmonic distortion (THD). Implemented in 65-nm CMOS process, this converter achieves 85.9% peak power efficiency with dc output voltage of 1.6V. The peak tracking efficiency and THD are 99.2% and 1.3%, respectively. The peak output power is 18.31μW, and the power loss of the entire converter is only 16.53μW.


Journal of Circuits, Systems, and Computers | 2015

Feed-Forward Slope Compensated PFC for Chaos Control

Yani Li; Yintang Yang; Zhangming Zhu; Chaolin Zhang

Based on the dual-loop control peak current mode power factor correction (PFC) converter, a feed-forward slope compensation method is proposed, which could regulate the compensated slope real-time and suppress the loop perturbation, thus controlling chaos of the system for better stability. A dual-loop Boost PFC model with the feed-forward slope compensation is built to analyze the nonlinear phenomena in system, and the corresponding circuit structure is presented. The chaos control ability of the feed-forward slope compensation is studied theoretically, and the relation of compensated slope and feed-forward signal is deduced, as well as slope stability conditions. The simulation and measured results show that this method could effectively suppress system bifurcation and chaos phenomena, and improve the system working range and dynamic response speed, and eliminate the influence on system stability for without compensated, under compensated, and over compensated.


international conference on asic | 2011

Zero-crossing distortion analysis in one cycle controlled boost PFC for Low THD

Yani Li; Yintang Yang; Zhangming Zhu; Wei Qiang

A low-power low THD boost PFC with one cycle control is discussed. Two novel structures, the periodic self-starting timer and feedforward current control block, are introduced to reduce the zero-crossing distortion. The improved boost PFC could regulate the switch turn-on time timely according to the ac input line voltage, and reduce the distortion near the input voltage zero-crossing points significantly. The experimental THD is only 3.8%, the power factor is 0.998, the load adjust rate is 3%, the linear adjust rate is less than 1%, and the efficiency is 96.9%. Both theoretical and practical results reveal that the improved PFC meets the demands for low-power and low THD.


international conference on asic | 2011

A novel low THD 4-quadrant analog multiplier using feedforward compensation for PFC

Yani Li; Yintang Yang; Zhangming Zhu; Wei Qiang

A novel 4-quadrant analog multiplier for PFC converters is presented based on CSMC 0.5µm BCD process. Gilbert cell is utilized to increase the dynamic input voltage range. The feedforward control technology is introduced to add 1/V2 to the multiplier output signal, where V in proportional to the input line voltage of PFC. This feedforward control cell efficiently compensates the loop gain of PFC and supplies more conversion energy to reduce THD. The simulated results show that the multiplier has an input voltage range of 0∼3V when the reference signal of the inner voltage loop changes from 0 to 5.5V, THD is less than 0.75%. The proposed multiplier has a good linearity and a low THD.


Archive | 2011

Analog sampling switch and analog-to-digital converter

Zhangming Zhu; Libo Qian; Yintang Yang; Yani Li


Analog Integrated Circuits and Signal Processing | 2018

A novel MPPT circuit with 99.1% tracking accuracy for energy harvesting

Yani Li; Ziyue Tang; Zhangming Zhu; Yintang Yang

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