Yao Feng Chang

Integrated One Diode–One Resistor Architecture in Nanopillar SiOx Resistive Switching Memory by Nanosphere Lithography

We report on a highly compact, one diode-one resistor (1D-1R) nanopillar device architecture for SiOx-based ReRAM fabricated using nanosphere lithography (NSL). The intrinsic SiOx-based resistive switching element and Si diode are self-aligned on an epitaxial silicon wafer using NSL and a deep-Si-etch process without conventional photolithography. AC-pulse response in 50 ns regime, multibit operation, and good reliability are demonstrated. The NSL process provides a fast and economical approach to large-scale patterning of high-density 1D-1R ReRAM with good potential for use in future applications.

Intrinsic SiOx-based unipolar resistive switching memory. I. Oxide stoichiometry effects on reversible switching and program window optimization

The physical mechanisms of unipolar resistive switching (RS) in SiOx-based resistive memory are investigated using TaN/SiOx/n++Si and TiW/SiOx/TiW device structures. RS is independent of SiOx thickness and device area, confirming that RS occurs in a localized region along a filamentary pathway. Results from experiments varying electrode type, series resistance, and the oxygen content of SiOxNy materials show the potential to optimize switching performance and control device programming window. Device materials with stoichiometry near that of SiO2 are found to have better operating stability as compared to extrinsic, N-doped SiOxNy materials. The results provide further insight into the physical mechanisms of unipolar operation and lead to a localized switching model based on electrochemical transitions involving common SiOx defects. High-temperature data retention measurements for over 104 s in high- and low-resistance states demonstrate the potential for use of intrinsic SiOx RS devices in future nonvola...

Demonstration of Synaptic Behaviors and Resistive Switching Characterizations by Proton Exchange Reactions in Silicon Oxide.

We realize a device with biological synaptic behaviors by integrating silicon oxide (SiOx) resistive switching memory with Si diodes. Minimal synaptic power consumption due to sneak-path current is achieved and the capability for spike-induced synaptic behaviors is demonstrated, representing critical milestones for the use of SiO2–based materials in future neuromorphic computing applications. Biological synaptic behaviors such as long-term potentiation (LTP), long-term depression (LTD) and spike-timing dependent plasticity (STDP) are demonstrated systematically using a comprehensive analysis of spike-induced waveforms, and represent interesting potential applications for SiOx-based resistive switching materials. The resistive switching SET transition is modeled as hydrogen (proton) release from (SiH)2 to generate the hydrogen bridge defect, and the RESET transition is modeled as an electrochemical reaction (proton capture) that re-forms (SiH)2. The experimental results suggest a simple, robust approach to realize programmable neuromorphic chips compatible with large-scale CMOS manufacturing technology.

Electroforming and resistive switching in silicon dioxide resistive memory devices

Electroforming and resistive switching in SiO2 materials are investigated by controlling the annealing temperature, etching time and operating ambient. Thermal anneal in reducing ambient lowers electroforming voltage to 10 nm from the electrode edge in devices with continuous SiO2 layers. Switching unpassivated devices fails in 1 atm air and pure O2/N2, with the recovery of vacuum switching at ∼4.6 V after switching attempts in O2/N2 and at ∼9.5 V after switching attempts in air. Incorporating a hermetic passivation layer enables switching in 1 atm air. Discussions of defect energetics and electrochemical reactions lead to a localized switching model describing device switching dynamics. Low-frequency noise data are consistent with charge transport through electron-trapping defects. Low-resistance-state current for <1.5 V bias is modeled by hopping conduction. A current “overshoot” phenomenon with threshold near 1.6 V is modeled as electron tunneling. Results demonstrate that SiO2-based resistive memory devices provide a good experimental platform to study SiO2 defects. The described electroforming methods and operating models may aid development of future SiO2-based resistive memory products.

Stabilization of multiple resistance levels by current-sweep in SiOx-based resistive switching memory

Using current-sweep measurements, the set process in SiOx-based resistive random access memory (RRAM) has been found to consist of multiple resistance-reduction steps. Variation in set behaviors was observed and attributed to different defect distributions in the resistance switching region. Physical mechanism of electroforming process is discussed, which further explains the observed variation of defect distributions. A compliance current study confirms that the achievable memory states of SiOx RRAM are determined by its set behavior. This finding provides additional insight on achieving multi-bit memory storage with SiOx RRAM.

Study of self-compliance behaviors and internal filament characteristics in intrinsic SiOx-based resistive switching memory

Self-compliance characteristics and reliability optimization are investigated in intrinsic unipolar silicon oxide (SiOx)-based resistive switching (RS) memory using TiW/SiOx/TiW device structures. The program window (difference between SET voltage and RESET voltage) is dependent on external series resistance, demonstrating that the SET process is due to a voltage-triggered mechanism. The program window has been optimized for program/erase disturbance immunity and reliability for circuit-level applications. The SET and RESET transitions have also been characterized using a dynamic conductivity method, which distinguishes the self-compliance behavior due to an internal series resistance effect (filament) in SiOx-based RS memory. By using a conceptual “filament/resistive gap (GAP)” model of the conductive filament and a proton exchange model with appropriate assumptions, the internal filament resistance and GAP resistance can be estimated for high- and low-resistance states (HRS and LRS), and are found to be...

Discussion on device structures and hermetic encapsulation for SiOx random access memory operation in air

An edge-free structure and hermetic encapsulation technique are presented that enable SiOx-based resistive random-access memory (RRAM) operation in air. A controlled etch study indicates that the switching filament is close to the SiOx surface in devices with an exposed SiOx edge. Electrical test of encapsulated, edge-free devices in 1 atmosphere air indicates stable switching characteristics, unlike devices with an edge. This work demonstrates that SiOx RRAM is able to operate in air with proper encapsulation and an edge-free structure. The resistive switching failure mechanism when operating in air is explained by the oxidation of hydrogen-complexed defects in the switching filament.

Characterization of external resistance effect and performance optimization in unipolar-type SiOx-based resistive switching memory

SiOx-based resistive random access memory devices with metal-insulator-metal structure are compared to metal-insulator-semiconductor structures, and the effects of external resistance on device performance are characterized. The different reset behaviors are explained as a positive feedback mechanism involving a sudden voltage decrease across the external series resistance when the reset process commences. By varying external resistance, we observe a constant threshold voltage (2.46 V) for the reset process that is possibly due to a voltage-triggered switching mechanism. Our experimental results not only clarify the reset mechanism but also provide insights on optimization of external resistance for programing reliability and operating speed.

A study of the interfacial resistive switching mechanism by proton exchange reactions on the SiOx layer

In this work, we investigated SiO(x)-based interfacial resistive switching in planar metal-insulator-metal structures using physical/chemical/electrical analyses. This work helps clarify the interfacial reaction process and mechanism in SiO(x), and also shows the potential for high temperature operation in future nonvolatile memory applications.

Bidirectional voltage biased implication operations using SiOx based unipolar memristors

This work presents a material implication implementation using SiOx based unipolar memristors. SiOx memristors with TaN/SiOx/Si structures have been fabricated, characterized, and used in the implication operation. The implication function and its truth table were well implemented using both positive and negative voltages for load resistor bias. The voltage range for the implication operation is reduced due to bidirectional bias. The key factors for the operation of material implication, such as load resistance, characteristics of the memristor, and design tradeoffs were investigated. This work demonstrates that unipolar SiOx based memristors are suitable for logic operations.