Yasuaki Tsuchiya

Tradeoff Characteristics Between Resistivity and Reliability for Scaled-Down Cu-Based Interconnects

We investigated tradeoff characteristics between resistivity and reliability for scaled-down Cu-based interconnects. A unique resistivity-measurement technique is proposed to detect influences due to impurity doping. Using this technique, we investigated the impacts of the impurity doping on three types of copper interconnects - cobalt-tungsten-phosphorous (CoWP) metal-cap interconnects, plasma-enhanced chemical-vapor-deposition self-aligned barrier interconnects, and CuAl alloy interconnects - and clarified the tradeoffs between the resistivity and the reliability. We found that the metal-cap interconnect shows not only high reliability but also outstanding efficiency with regard to the suppression of resistance increase due to impurity doping.

Cleaning of CHF3 plasma-etched SiO2/SiN/Cu via structures using a hydrogen plasma, an oxygen plasma, and hexafluoroacetylacetone vapors

Cleaning processes for CHF3 reactive ion etched Cu vias, consisting of exposure to a hydrogen plasma, an oxygen plasma, and hexafluoroacetylacetone [H(hfac)] vapors have been investigated. After each step in the cleaning process, the dielectric surface and the Cu surface of via structures were analyzed by in situ by angle-resolved x-ray photoelectron spectroscopy. A hydrogen plasma was effective in removing carbon and fluorine deposits on all of the surfaces, and CuO and Cu2O on the Cu surface at the via bottom. It was not effective, however, in removing the Cu deposited on the dielectric surfaces. An oxygen plasma is effective in removing all the carbon and some fluorine deposits. Cu deposits on the dielectric surfaces were not removed, however, and the Cu surface was oxidized. Exposure to H(hfac) vapors reduced some of the Cu deposits on the dielectric, however Cu diffusion into SiO2 possibly occurred during this exposure at the elevated temperature of 200 °C. CuO and Cu2O were removed by the H(hfac) ex...

A high reliability copper dual-damascene interconnection with direct-contact via structure

Direct-contact via (DCV) structure in which a Cu via-plug is directly contacted to an interconnect is proposed for a high reliability and high performance Cu dual-damascene (DD) interconnection. Distribution of electromigration (EM) lifetime is dramatically reduced to 0.1 by eliminating void formation at the via-bottom. The developed technology improves the lifetime of the early failure by 5 times. It leads to 1.7 times higher clock frequency due to the higher current density.

A Novel Resistivity Measurement Technique for Scaled-down Cu Interconnects Implemented to Reliability-focused Automobile Applications

A novel resistivity measurement technique has been proposed for scaled-down Cu interconnects viewing the high-reliability automobile applications. This technique enables to detect the interconnect resistivity dependence on impurity concentration, free from dimension dependence. Using this technique, we investigated impacts of impurity concentration on three types of Cu interconnects: 1) CoWP cap; 2) PECVD self-aligned barrier (PSAB); and 3) CuAl interconnects and clarified the tradeoffs between resistivity and reliability. We have found that CoWP cap shows not only high-reliability but also an outstanding efficiency in suppression of resistance increase due to impurity-induced scattering, indicating that it is the most viable candidate for automobile applications in 32nm generation and beyond

A robust 45 nm-node, dual damascene interconnects with high quality cu/barrier interface by a novel oxygen absorption process

By a novel oxygen absorption process, low oxygen-content Cu-alloy is implemented for fully-scaled-down, 45 nm-node dual damascene interconnects (DDIs) with 140 nm-pitched lines and 70 nmOslash-vias. In this process, a very thin metal film as an oxygen absorber, which has larger negative change in the standard Gibbs free energy of oxidation than a barrier metal, is put on a natural oxide at a surface of electro-plated, Cu film. The oxygen atoms diffuse to the oxygen absorber, not to the barrier metal under the Cu film, achieving high quality Cu/barrier interface after annealing. Combining the oxygen absorption process with Cu-alloy process, 45 nm-node DDI in molecular-pore-stacking (MPS) SiOCH film is successfully obtained with high endurances for SIV, EM and TDDB

Low resistance copper via technology

In order to reduce specific contact resistance at via/interconnect interface and to avoid device degradation with Cu diffusion into dielectrics, via cleaning technology is a critical issue for a scaled down Cu multilevel metallization. Effects of cleaning processes are investigated for CHF 3 plasma-etched SiO 2 /SiN/Cu via-structures. Effects of dilute HF (DHF) cleaning, hydrogen plasma cleaning, oxygen plasma cleaning, hexafluoroacetylacetone (H(hfac)) vapor cleaning, and vacuum anneal cleaning are investigated using an angle-resolved x-ray photoelectron spectroscopy (XPS). Cu contamination removal using dilute oxalic acid (DOA) is investigated using total reflection xray fluorescence analysis (TRXRF). Based on the results, we developed an optimized cleaning sequence which consists of a brief oxygen plasma exposure, DHF dipping, followed by exposure to H(hfac) vapors. The cleaning sequence is effective in obtaining a clean dielectric surface and an oxide-free Cu surface at via bottom. Direct-contacted via structures were fabricated by a dualdamascene process using the cleaning sequence. The specific contact resistance reduces to 20% of the reported values. We expect that the via resistance is low enough to be used in 0.13 µm generation and beyond.