Yasuhiro Kawase

High thermal conductivity underfill for the thermal management of three-dimensional (3D) chip stacks

It has been experimentally clarified that one of the thermal resistance bottlenecks of a three-dimensional (3D) chip stack is interconnection (solder bumps and underfill) between stacked chips. High thermal conductivity underfill, which we call high thermal conductivity inter chip fill (ICF), is expected to reduce the thermal resistance of interconnection efficiently, because the area which is occupied by ICF is larger than solder bumps. It is shown by simulation how high thermal conductivity ICF contributes to decrease the thermal resistance of interconnection. Also material formulation of high thermal conductivity ICF is demonstrated.

Polishing Mechanism of Glass Substrates with its Processing Characteristics by Cerium Oxide and Manganese Oxide Slurries

With an aim to reduce the consumption of cerium oxide (CeO2) used in large quantity for the polishing of glass substrates applied for HDD and display, we have attempted to obtain the processing characteristics of glass substrates by CeO2 slurry. We also paid attention to manganese oxide abrasives to replace cerium oxide abrasives. As a result, we have found Mn2O3 abrasives potential to replace disappearing CeO2 for the polishing of glass substrates.

An Outgas Free Passivation Technology for Semiconductor Vacuum Chamber using Advanced Anodic Oxidation

In order to apply the aluminum alloy to the semiconductor vacuum chamber, appropriate passivation surface process is essential. Following characteristics are required for the passivation film of advanced semiconductor chamber. 1) no outgas(H2O) 2) no heat crack 3) no corrosion by the process chemicals 4) no damage by the plasma irradiation 5) no catalyst effect to the decomposition of the process gas

Development of Barrier Anodic Oxide Al2O3 Passivations of Aluminum Alloy Surface for LSI/FPD Plasma Process Equipment

Aluminum alloys are key materials for advanced large-scale integration (LSI)/flat panel display (FPD) plasma process equipment to drastically improve the process performance. There exists a severe disadvantage for aluminum-alloy process chambers, however, i.e., very poor anticorrosion capability to halogen gas plasmas. Thus, the authors have developed very advanced Al 2 O 3 passivation films having a thickness of 0.1-0.4 μm on aluminum-alloy surfaces exhibiting complete anticorrosion resistance for various radicals such as hydrogen radicals H*, oxygen radicals O*, halogen radicals (Cl*,Br*,F*), and simultaneously various ion bombardments by using nonaqueous anodic oxidations. Porous alumite (alumilite) films having a thickness of 50-200 μm have been provided on aluminum-alloy chamber surfaces as anticorrosion films using aqueous anodic oxidations, particularly for reactive ion etching process chambers. But alumite films (Al 2 O 3 nH 2 O) include huge amounts of water molecules, resulting in the generation of water vapors in the process chamber and leading to the degradation of process quality and the generation of too many particles in the process chamber coming from water-molecule-originated gas-phase reactions. 1 Plasma process performance of LSI/FPD manufacturing is drastically enhanced by introducing a newly developed Al 2 O 3 passivated aluminum-alloy chamber to overcome all disadvantages of current plasma process equipment.

A Defect-Free Anodic Oxide Passivation for LSI/FPD Vacuum Chamber

Aluminum alloys were anodized in nonaqueous electrolyte solution and surface microroughness of anodic oxide grown on the alloys in nonaqueous electrolyte solution is found by far less than that grown in aqueous electrolyte solution. Barrier type anodic oxides on high-purity Al/Mg/Zr(AlMg2) alloys in nonaqueous solution are found to feature excellent characteristics: no voids or seams are formed, outgas from anodic oxides is very much limited, they feature outstanding resistance to process gases. Anodization of AlMg2 alloys in nonaqueous electrolyte solution will be promising surface passivation of LSI/FPD vacuum equipments.

Pre-Applied Inter Chip Fill for 3D-IC Chip Joining

For the conventional two dimensional (2D) packaging of integrated circuit (IC), reflow and capillary under fill have been used for more than a decade. But for the purpose of low power and high performance of IC, three dimensional IC (3D-IC) have been proposed in recent years. In case of 3D-IC, both bump pitches and gaps between stacked thin chips should be fine and narrow, so that pre-applied inter chip fill (ICF) which is applied in thermal compression bonding have been proposed. In this process, not only low viscosity but also thermal conductivity is simultaneously required. In this study, some of selected epoxy based matrix and filler were simulated and evaluated for pre-applied ICF, we confirmed its process applicability to pre-applied chip bonding. Physical characteristics of cured ICF and void-less joining were also discussed.