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Featured researches published by Yasuhiro Nakatsuka.


custom integrated circuits conference | 2001

A one chip super graphics CPU with direct unified memory controller suitable for car information and control system

Yasuhiro Nakatsuka; Tetsuya Shimomura; Yuichiro Morita; Kazuhisa Takami; Manabu Joh; Masahisa Narita; Kazushige Yamagishi; Yutaka Okada; Jun Satoh

A one chip super graphics CPU with graphics and unified memory controller has been developed. It requires no dedicated graphics memory and has significantly lower system cost with 1.6 times higher performance than CPUs with state-of-the-art technology. Its process and package are 0.18 /spl mu/m and 256 pin QFP, respectively.


Archive | 1988

Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices

Takashi Hotta; Kozaburo Kurita; Masahiro Iwamura; Hideo Maejima; Shigeya Tanaka; Tadaaki Bandoh; Yasuhiro Nakatsuka; Kazuo Kato; Sin-ichi Sinoda


Archive | 1995

Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory

Masahiko Saito; Kenichi Kurosawa; Yoshiki Kobayashi; Tadaaki Bandoh; Masahiro Iwamura; Takashi Hotta; Yasuhiro Nakatsuka; Shigeya Tanaka; Takeshi Takemoto


Archive | 1995

Image data processor for processing pixel data in block buffer

Yasuhiro Nakatsuka; Keisuke Nakashima; Shigeru Matsuo; Masahisa Narita; Koyo Katsura; Hidehito Takewa; Tomoaki Aoki


Archive | 1993

Method and apparatus for controlling one or more hierarchical memories using a virtual storage scheme and physical to virtual address translation

Toshio Doi; Takeshi Takemoto; Yasuhiro Nakatsuka


Archive | 1998

Graphic processor and data processing system

Atsushi Nakamura; Yasuhiro Nakatsuka; Kazushige Yamagishi


Archive | 1997

Data processor having unified memory architecture providing priority memory access

Tetsuya Shimomura; Shigeru Matsuo; Koyo Katsura; Tatsuki Inuzuka; Yasuhiro Nakatsuka


Expert Systems With Applications | 1995

Parallel processing apparatus and method capable of switching parallel and successive processing modes

Kenichi Kurosawa; Shigeya Tanaka; Yasuhiro Nakatsuka; Tadaaki Bandoh


Archive | 2010

Packet communication device, packet communication system, packet communication module, data processor, and data transfer system

Hiroshi Arita; Yasuhiro Nakatsuka; Yasuwo Watanabe; Kei Ouchi; Yoshihiro Tanaka; Toshinobu Kanai; Masanobu Tanaka; Kenji Furuhashi; Tomoaki Aoki


Archive | 1997

Information processor and information processing system utilizing clock signal

Takashi Hotta; Kozaburo Kurita; Masahiro Iwamura; Hideo Maejima; Shigeya Tanaka; Tadaaki Bandoh; Yasuhiro Nakatsuka; Kazuo Kato; Sin-ichi Sinoda

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