Yasunori Chonan

Effect of the Purity of Plating Materials on the Reduction of Resistivity of Cu wires for Future LSIs

Resistivity difference between Cu wires made with plating using high purity (new plating process) and conventional purity (conventional process) materials has been evaluated in order to develop the process for the realization of high performance LSIs. This resistivity difference is relatively small, i.e., 8% when line width is wide (200 nm). However, it increases with the decrease in line width, and it reaches about 20%, i.e., 2.8 μΩ cm for the former and 3.5 μΩ cm for the latter at 50 nm line width. A 50 nm wide Cu wire formed with the new plating process had more uniform and larger grain sizes and lower impurity concentrations than the wire formed with the conventional process.

Observation of microstructures in the longitudinal direction of very narrow Cu interconnects

We have succeeded in observing the longitudinal microstructure of very narrow Cu interconnects for the first time. We found that the average grain sizes along the longitudinal direction of Cu interconnect trenches increased with increasing line width, and they were 278 nm for 80 nm, 303 nm for 100 nm, and 346 nm for 180 nm wide interconnects. Ratios of the average grain size to line width were 3.5 for 80 nm, 3.03 for 100 nm, and 1.9 for 180 nm line widths.

The Low Temperature Bonding between Si and Electrode Using Sputtered Ag Films

A low temperature Joining process using sputtered Ag films has been investigated. The surfaces of Ag films were cleaned by heating them to more than 523 K in air. After cleaning, the Si chip and the Mo can be joined using a Ag film under joining conditions as: temperature 503 K; compressive stress: 60 MPa; holding time: 0.5 h; atmosphere: air. A diode made with this low temperature joining process using Ag film exhibits an excellent low leakage current–voltage characteristics.

A Void Free Soldering Process in Large-Area, High Power Insulated Gate Bipolar Transistor Modules

We have developed a new void free process for making the solder joint between the chip mounted AlN substrate and the metal substrate in large-area, high power insulated gate bipolar transistor (IGBT) modules. This new process consists of two steps. First, Ar+ were used to clean the surfaces of Ni plated film on a metal and AlN substrates which were then coated with 0.5-µm-thick Ag film. Second, 50 wt% Pb–Sn solder was sandwiched between the two substrates and heated to 503 K in a vacuum for 5 min before being cooled in a N2 atmosphere. By using this process, the area percentage of voids in a soldering area up to 130×190 mm2 can be reduced to less than 0.1%. IGBT modules made by this process were also found to exhibit satisfactory current-voltage characteristics.

Grain-Oriented Ca3Co4O9 Thermoelectric Oxide Ceramics Prepared by Solid-State Reaction

We studied a method to enhance the degree of grain orientation of Ca3Co4O9 thermoelectric oxide ceramics. Ceramic specimens were prepared by solid-state reaction with different growth conditions. Large-grained Ca3Co4O9 powders were obtained by using “heavy-calcination” and “moderate-grinding” steps before pelletizing, and these large-grained powders contributed to the enhancement of the degree of orientation. Scanning electron microscopy (SEM) observation results showed that plate-like crystal grains were stacked up in layers for the heavily calcined ceramics, while no such anisotropic structure was found for those that were lightly calcined. x-Ray diffraction (XRD) analysis also indicated that the specimen obtained by heavy-calcination and moderate-grinding steps had a high degree of (002) orientation. The effect of the heavy-calcination and moderate-grinding steps was clearly evidenced by the electrical resistivity ρ. The electrical resistivity ρ at 700°C for the higher-oriented ceramics was 73% of that for the lower-oriented ceramics. Since ρ was reduced without deterioration of the Seebeck coefficient S, the power factor (S2/ρ) at 700°C for the former was increased by 29% compared with that for the latter.

Reduction in resistivity of 50 nm wide Cu wire by high heating rate and short time annealing utilizing misorientation energy

The resistivities and microstructures for 50 nm Cu wires fabricated by high heating rate (3 K/s) and short time (1 min) annealing using infrared rapid thermal annealing equipment have been investigated as a function of annealing temperature and compared to those properties for wires fabricated by a slow heating rate (0.08 K/s), long time (30 min) conventional H2 annealing process. The resistivity of wires annealed by the new process decreased substantially with increasing annealing temperature from 573 to 773 K. The resistivity had its lowest value between 773 and 873 K, and it increased rapidly with annealing temperature above 923 K. The average ρ value was 2.98 μΩ cm for 773 K new process wires, whereas average ρ values were about 3.55 μΩ cm for 573 K and 3.42 μΩ cm for 673 K conventionally H2 annealed wires. This resistivity value for the new process wires was about 16% lower than the value for wires annealed at 573 K and 13% lower than the value for the wires annealed at 673 K by the conventional H2 a...

Photoconductivity of the two polar surfaces of ZnO

Transient photoconductivity of the two polar surfaces of ZnO single crystal has been studied by using a fast-pulse technique. When ZnO crystal was irradiated by an ultraviolet (UV) light pulse, an obvious Dember effect was observed for both polar surfaces. The sign of the Dember effect indicated that the dominant photocarriers were electrons. Additionally, two distinct differences in UV photoconductivity were observed for the two polar surfaces. First, photocurrent Q was much larger for the O surface than for the Zn surface. The ratio of QO to QZn was about 100 when the applied electric field E was perpendicular to the c-axis and about 30 when E was parallel to it. Second, the excitation light intensity I dependence was quite different. While the photocurrent of the O surface was proportional to I, the photocurrent of the Zn surface was proportional to I1∕2. These results indicated that the recombination processes of photocarriers were quite different between O and Zn surfaces; namely, the direct recombin...

The Development of an Innovative Process of Large Grained and Low Resistivity Cu Wires for less than hp 45nm ULSI

We have developed an innovative process to create large grained and low resistivity Cu wires for less than hp 45 nm ULSIs. The resistivity of the 50 nm wide Cu wires by an innovative high purity process is found to be 21% lower than those created by the conventional process. It was also found that Cu wires formed with the new high purity process have larger grains with a smaller spread and a lower impurity concentration than those made with the conventional process. This innovative new process is expected to be a powerful candidate for created Cu wire of less than hp 45 nm ULSIs.

Aspect Ratio Dependence of the Resistivity of Fine Line Cu Interconnects

The effect of aspect-ratios of very narrow Cu interconnects of less than 100 nm on the resistivity has been discussed. From longitudinal cross-sectional transmission electron microscope (TEM) observation, many very small grains were observed at the bottom of the trench, while larger grain sizes are predominant in the upper part of the Cu interconnects. The resistivity was found to decrease significantly when increasing the aspect-ratio in fine line Cu wires due to the larger grain size distributions in the upper part of the Cu interconnects with higher aspect-ratios. This result demonstrates that the aspect-ratio of Cu wires are effective for controlling the resistivity in future Cu interconnects with very narrow and shallow dimensions.

Magnetic properties of ZnO:V films formed by pulsed laser deposition with bias voltage application

Magnetic properties of ZnO films doped with V atoms (a 3d transition metal) were investigated by fabricating specimens using pulsed laser deposition (PLD) with bias voltage application. Electron concentrations of the ZnO:V films were changed by two methods: one was to dope with conventional n-type and p-type impurities, and the other was to change native (donor-type) defect concentrations by applying bias voltages during the film deposition. In M-H curves, smaller magnetization was observed for the film with a low electron concentration (5×1016 cm−3) and it increased linearly with the applied magnetic field, while larger magnetization was observed for the film with a medium electron concentration (5×1018 cm−3) and it exhibited a saturation at about 3 kOe. The saturation magnetization had maximum values for the electron concentrations of 1×1018–5×1018 cm−3 for the films formed by using either dopant impurities or PLD bias voltages. Anomalous Hall effect measurement of the films showed that the convergence ...