Yasuyuki Kojima
Hitachi
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Publication
Featured researches published by Yasuyuki Kojima.
international conference on asic | 1998
Yasuyuki Kojima; Noboru Akiyama; Takayuki Oouchi; Masatsugu Amishiro; Minehiro Nemoto; S. Yukutake; A. Watanabe
This is the first report of the development of a monolithic isolator that can provide a transformerless small communications network interface IC. A novel capacitively isolated technology using trench capacitor on the SOI substrate has been developed, and that has achieved a 1.2 kV monolithic isolator of 0.25 mm/sup 2/. The monolithic isolator exhibits a good transmission characteristic at the frequency of 10 MHz.
international symposium on power semiconductor devices and ic s | 2000
Yasuyuki Kojima; Minehiro Nemoto; Seigou Yukutake; Takayuki Iwasaki; M. Amishiro; Nobuyasu Kanekawa; Atsuo Watanabe; Yusuke Takeuchi; Noboru Akiyama
We have developed a multi-channel monolithic isolator IC that can provide 2.3 kVac isolation and 100 MHz signal transmission. This IC uses high voltage on-chip isolator technology using trench isolation with buried oxide on the SOI substrate and 0.4 /spl mu/m CMOS driver and receiver circuits. This technology enables to produce a 4-channel monolithic isolator with an area of 1.5 mm/sup 2/ and a consumption current of 0.5 mA per channel at a frequency of 50 MHz. We have also developed a one-chip modem interface IC that includes the multi-channel isolator and an analog front-end circuit.
Journal of Electronic Imaging | 1992
Keisuke Nakashima; Shinichi Shinoda; Yasuyuki Kojima; Yasuro Hori; Toshiaki Nakamura; Noboru Suemori
A total and coherent image processing architecture for G3/G4/ISDN facsimiles is proposed that features high-quality multi-level processing by means of correlative area scanning and a software-oriented processing architecture. This image processing LSI controller includes a resolution converter and error diffusion halftone processing circuits in 4000 gates. A semi-superfine scanning mode is evaluated, which will be adopted as a new CCITT G3 optional mode.
international symposium on power semiconductor devices and ic's | 2009
Takayuki Hashimoto; Y. Yuyama; M. Amishiro; Minehiro Nemoto; Seigou Yukutake; Yasuyuki Kojima; Nobuyasu Kanekawa; Yusuke Takeuchi; A. Watanebe
We have developed a monolithic isolator that provides an isolation voltage of 4 kV and a signal transmission rate of 100 Mbps. Two circuit areas are isolated using 34 trenches on a bonded SOI with 3-µm-thick buried oxide. The inequality in the voltages applied to the trenches is reduced using polysilicon resistors parallel to the trenches, which increases the isolation voltage from 2.4 to 4.0 kV. The isolator consists of two series of high-voltage capacitors in which silicon on buried oxide and a third metal are used as electrodes. We have also developed a network interface LSI with 4-channel isolators, which provide 4-kV isolation and 100-Mbps transmission.
Archive | 1985
Yasuyuki Kojima; Nagaharu Hamada; Yasuro Hori
Archive | 1986
Kunio Sato; Yasuyuki Kojima
Archive | 2001
Akihiko Emori; Takuya Kinoshita; Hideki Miyazaki; Yasuyuki Kojima; Noboru Akiyama
Archive | 1999
Seigoh Yukutake; Yasuyuki Kojima; Minehiro Nemoto; Masatsugu Amishiro; Takayuki Iwasaki; Shinichiro Mitani; Katsuhiro Furukawa; Chiyoshi Kamada; Atsuo Watanabe; Takayuki Oouchi; Nobuyasu Kanekawa
Archive | 2002
Shoji Suzuki; Kunihiko Tsunedomi; Satoru Funaki; Masahiko Saito; Yasuyuki Kojima; Takanori Yokoyama; Atsushi Ito
Archive | 2003
Noboru Akiyama; Minehiro Nemoto; Seigou Yukutake; Yasuyuki Kojima; Kazuyuki Kamegaki