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Dive into the research topics where Seigou Yukutake is active.

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Featured researches published by Seigou Yukutake.


international symposium on power semiconductor devices and ic s | 2000

2.3 kVac 100 MHz multi-channel monolithic isolator IC

Yasuyuki Kojima; Minehiro Nemoto; Seigou Yukutake; Takayuki Iwasaki; M. Amishiro; Nobuyasu Kanekawa; Atsuo Watanabe; Yusuke Takeuchi; Noboru Akiyama

We have developed a multi-channel monolithic isolator IC that can provide 2.3 kVac isolation and 100 MHz signal transmission. This IC uses high voltage on-chip isolator technology using trench isolation with buried oxide on the SOI substrate and 0.4 /spl mu/m CMOS driver and receiver circuits. This technology enables to produce a 4-channel monolithic isolator with an area of 1.5 mm/sup 2/ and a consumption current of 0.5 mA per channel at a frequency of 50 MHz. We have also developed a one-chip modem interface IC that includes the multi-channel isolator and an analog front-end circuit.


international symposium on power semiconductor devices and ic's | 2009

4-kV 100-Mbps monolithic isolator on SOI with multi-trench isolation for wideband network

Takayuki Hashimoto; Y. Yuyama; M. Amishiro; Minehiro Nemoto; Seigou Yukutake; Yasuyuki Kojima; Nobuyasu Kanekawa; Yusuke Takeuchi; A. Watanebe

We have developed a monolithic isolator that provides an isolation voltage of 4 kV and a signal transmission rate of 100 Mbps. Two circuit areas are isolated using 34 trenches on a bonded SOI with 3-µm-thick buried oxide. The inequality in the voltages applied to the trenches is reduced using polysilicon resistors parallel to the trenches, which increases the isolation voltage from 2.4 to 4.0 kV. The isolator consists of two series of high-voltage capacitors in which silicon on buried oxide and a third metal are used as electrodes. We have also developed a network interface LSI with 4-channel isolators, which provide 4-kV isolation and 100-Mbps transmission.


international symposium on power semiconductor devices and ic's | 2012

4.5-kV multi-chip level-shift circuit using dedicated discrete IGBTs for driving high-power IGBTs

Naoki Sakurai; K. Takami; Seigou Yukutake; Y. Kouno; Junichi Sakano

A 4.5-kV voltage level-shift circuit with a multi-chip structure composed of upper and lower arm driver ICs and dedicated discrete IGBTs was developed. It was experimentally confirmed that this level-shift circuit could drive a 3.3-kV/1200-A IGBT module.


Archive | 1995

SRAM having load transistor formed above driver transistor

Shuji Ikeda; Satoshi Meguro; Soichiro Hashiba; Isamu Kuramoto; Atsuyoshi Koike; Katsuro Sasaki; Koichiro Ishibashi; Toshiaki Yamanaka; Naotaka Hashimoto; Nobuyuki Moriwaki; Shigeru Takahashi; Atsushi Hiraishi; Yutaka Kobayashi; Seigou Yukutake


Archive | 2006

Bi-directional DC-DC converter and control method

Tatsumi Yamauchi; Hiroyuki Shoji; Seigou Yukutake; Toshikazu Okubo


Archive | 2005

Isolated bidirectional DC-DC converter

Hiroyuki Shoji; Akihiko Kanouda; Ryuichi Saito; Seigou Yukutake; Katsuhiro Higuchi


Archive | 2003

Semiconductor device and communication terminal using thereof

Noboru Akiyama; Minehiro Nemoto; Seigou Yukutake; Yasuyuki Kojima; Kazuyuki Kamegaki


Archive | 1995

Semiconductor integrated circuit device and process for fabricating the same

Shuji Ikeda; Satoshi Meguro; Soichiro Hashiba; Isamu Kuramoto; Atsuyoshi Koike; Katsuro Sasaki; Koichiro Ishibashi; Toshiaki Yamanaka; Naotaka Hashimoto; Nobuyuki Moriwaki; Shigeru Takahashi; Atsushi Hiraishi; Yutaka Kobayashi; Seigou Yukutake


Archive | 1990

Method for producing semiconductor integrated circuit device

Kyoichiro Asayama; Hiroyuki Miyazawa; Yutaka Kobayashi; Seigou Yukutake


Archive | 1997

Semiconductor device capable of holding signals independent of the pulse width of an external clock and a computer system including the semiconductor device

Seigou Yukutake; Takashi Akioka; Kinya Mitsumoto; Takahiro Nagano; Hideo Maejima

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